How to to define the mipi CSI0_CLKp and CSI0_CLKn at jetson TX1 r28.2?
looks same question as https://devtalk.nvidia.com/default/topic/1032726/
let’s keep this in the same discussion thread, thanks
How to to define the mipi CSI0_CLKp and CSI0_CLKn at jetson TX1 r28.2?
looks same question as https://devtalk.nvidia.com/default/topic/1032726/
let’s keep this in the same discussion thread, thanks