How to use PCIE C4 root port?

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Orin
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The AGX carrier card is designed by us. We connected the PCIE (C4) controller to the PCIE to USB device. The PCIE data width is X1 (UPHY_TX8_P/N，UPHY_RX8_P/N), and the mode is ROOT， but the following error occurred. How should it be modified.

Test that the PEX_L4_RST_N pin is always low，and AGX has no clock output，and CLK_REQ_N is always low.

The following picture shows the location of our modification (see the attachment for the entire file)

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image902×346 10.4 KB

tegra194-p2888-0000-a00.dtsi (6.1 KB)

The printing information is as follows：

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image1038×178 11 KB

dmesg.txt (69.4 KB)

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I’m closing this topic due to there is no update from you for a period, assuming this issue was resolved.
If still need the support, please open a new topic. Thanks

What is the exact platform you are using here? You filed this topic in Orin AGX forum.

But your dts is AGX Xavier platform.