I want to change 'FAN_PWM signal logic'.

Hi nVIDIA staff

The FAN_PWM signal is a negative logic pulse.
Please tell me how to change to positive logic pulse.

that’s all.

I think you question should be how to change FAN_PWM duty cycle to decrease positive Pulse.
Please find PWM CONTROLLER in http://developer.nvidia.com/embedded/dlc/tegra-x1-technical-reference-manual
PWM_CONTROLLER_PWM_CSR_*_0 Pulse width that needs to be programmed N=N/256 Pulse high.
FAN_PWM is PWM3.

Hi JimWang

thank you for your answer.
However, it seems that it is not the expected answer.

When the PWM driver is installed, the ‘FAN_PWM’ signal goes to ‘H’ level, and when a pulse signal is generated, a negative logic pulse is output.
(‘L’ level before driver installation)

I want to change this behavior as follows.
· When pulse is not generated, ‘L’ level
• Pulse generation section: ‘H’ level

Where can I modify it?

that’s all.

Do you design you own carrier board?
If yes do you adding any PU/PD on signal FAN_PWM on carrier board?
If you add PD on FAN_PWM that will give the default “L” you want, if not also can set pinmux when boot to give “L” before driver install. In driver can configurate PWM Pulse width with low Pulse high before enable it.

Hi JimWang

thank you for your answer.

Yes.
Our Carrier Board.
We are currently debugging hardware.
There is no PU / PD on the carrier board.
The PD setting is enabled with Pinmux setting.

you said:
In driver can configurate PWM Pulse width with low Pulse high before enable it.

Is it possible to edit the device tree?
Or do I need to edit the driver source code?

that’s all.

Hi JimWang

Please answer.

Please add a PD to FAN_PWM, that will fit your request – to keep low when no output.

Hi JimWang.

Your understanding is wrong.

On the Jetson evaluation board, the relationship between PWM data, FAN_PWM signal and FAN operation is as follows.

PWM_Data FAN_PWM FAN_status
0x00 ‘H’ stop
0xFF ‘L’ Full

In other words, Jetson is outputting an inverted negative logic signal.

Now, reversing the weight of the PWM data
0xFF → stop
0x00 → Full
We are editing table data of FAN.

Also in the Tegra specifications the PWM polarity appears to be changeable.
Is there no way to change the output logic of the FAN_PWM signal?

that’s all.

As you can see the instruction of register PWM_CONTROLLER_PWM_CSR_*_0 in TRM, it is ‘N/256 Pulse high’, the polarity is unchangeable.