we’ve recently ran into an issue which seems related to different hardware revisions of the TX1. It concerns the i2c bus 2.
We’ve tested our hardware design for a hardware revision of 699-82180-1000-401 D.0, where we use an additional device with address 0x52 on that i2c bus. This has so far worked well.
However, we have identified an issue now, that seems to be related to different hardware revisions of the TX1. There is a board with revision 699-82180-1000-100 U.0 on which 0x50 0x51 0x52 and 0x53 seem to be taken already.
The documentation only mentions the 0x50 eeprom, which is specified as 256 bytes. Could it be that on this specific hardware revision a 1k-eeprom is used taking all the additional i2c addresses?
Is there any documentation on the different hardware revisions and their differences?