i2s audio on csi connector

I’m trying to use i2s audio on the csi connector to record audio. The ic I’m using on my board, which is connected to the csi connector, generates mclk, sclk, lrclk, and the audio data. I can’t figure out how mclk is handled in this configuration. Is the only source for mclk the aud_mclk generated by the TX1? If so, then how do I get that signal to our csi board since that signal is not available on the csi connector. Is there some other method that can make use of the i2s’s sclk to create an mclk?

If you want to use I2S on CSI connector for codec, a mclk is needed.
And yes, it is the only source for aud_mclk on TX1, sclk cannot be used as mclk.

I’m a little confused by your response. Are you saying that the IC on my board connected to the csi connector needs to use aud_mclk as its mclk? If so, how do I connect aud_mclk to my board since that signal is not available on the csi connector.

I’ve noticed that there are cam1_mclk and cam2_mclk signals on the csi connector. Those signals are described as the camera’s master clock. I’m assuming those signals are to be used with a camera and are not intended to be used as audio mclks. Is this right?

What are my choices for getting the i2s interface on the csi connector working?

I mean there is not audio mclk on CSI connector, if your codec need a mclk, you’d better to choose connector J21, as aud_mclk and audio_i2s are on it, otherwise you need to fly wires of aud_mclk signal to your codec board. Cam_mclk cannot be used for it.

Well, I need to J22 since I need to use the CSI interface for camera video. However, I also need to handle incoming audio. The IC I’m using provides an I2S interface. It generates MCLK, so I don’t need MCLK from the TX1. My board connects the IC’s I2S interface to I2S4 on J22, but when I try to play that audio I get a timeout from the system. I’ve been assuming that this is because the TX1 needs MCLK. However, you seem to be saying the MCLK for the TX1 is provided by aud_mclk. I’m assuming that this is a 24 MHz or 12 MHz MCLK generated by the TX1.

Given this arrangement, how would I get the audio to work? What am I missing?

This thread might help with this issue: https://devtalk.nvidia.com/default/topic/949616/setting-audio_mclk-to-output/?offset=7#4937214?

Yes, I had already found that thread and it helped with getting I2S1 working.

To get this working I had to connect the I2S4 signals to I2S1 and change the dts files to set the I2S1 signals to master instead of slave (frame and bitclock). I’m now able to record sound. For some reason nothing I did would get I2S4 working to record sound.

Any luck/progress on this one?

Any luck/progress on this one?

Hi there,

We have HDMI-B working at HD resolution on TX2. We have wired I2S1 as referred. EDID is also configured as advised.

We are still unable to get the audio. Any pointers?

Hi TheCompWiz and vijay.ranganathapura,

Welcome to Jetson & Embedded Systems developer forum.

This topic is on TX1, if your issue is on TX2, please file your issue into TX2 board - https://devtalk.nvidia.com/default/board/188/jetson-tx2/

If not, suggest to file a specific topic for your issue.

Thanks