implement the TX2 power-up sequence using FPGA, but TX2 failed to boot up

Hi all,
i use FPGA to control the TX2 modules’s powering-up in my custom carrier board,

FPGA will do the following:

A. assert VIN_PWR_BAD_L for 500ms, then deassert this signal to notiy the PMIC power is ready.

B. after the deassertion of VIN_PWR_BAD_L, pulsing the POWER_BTN_L low for about 300ms (to simulate a on key press).

C. all the other power-up specific pins (like RESET_OUT_L, RESET_IN_L,etc ) are kept disconnected with my custom board

Note that there is a little difference between my custom carrier board and the NVIDIA’s developer’s TX2 kit
i.e. :

    some pins of TX2 modules are connected to other ICs on my carrier board, like:

    FAN_PWM ( pulled up by VDD_1V8 from my carrier board)
    HDMI_DDC_SCL_POL, HDMI_DDC_SDA_POL, HDMI_HPD ( connected to a HDMI--->VGA converter IC)
    CAN_WAKE, UART1/2 TX/RX (connected to CAN & RS422 transceiver)

    however, these ICs are already powered up before TX2,

    that is to say:

    [b]the above pins (FAN_PWM,  HDMI_DDC_SCL_POL, HDMI_DDC_SDA_POL, HDMI_HPD,CAN_WAKE, UART1/2 TX/RX, ... )
    may have sensed voltages ( 3.3V/1.8V )[/b]

the OEM design guide says that TX2 must be powered up before
the carrier board…

BUT, i THINK this should not affect the normal power-up of TX2 module, since

FPGA has already driven VIN_PWR_BAD_L for the initial 500ms ( which “lies” to TX2 that power is not ready )

Is my understanding correct ???


As FPGA completes the Power up sequence, as described earlier.
we found that TX2’s UART-0 can only work in “echo” mode,

i.e., it simply bounces your input:
in SecureCRT (a UART utility run in windows ), if you enter ‘A’, TX2’s UART-0 will
feedback ‘A’ and it will be displayed in the console of SecureCRT

    <b>but TX2 itself does not dump any log</b>

Shall carrier board be powered up later than the TX2 module in a strict manner ??

What if this rule is violated ?

will it actually affect the TX2’s boot up process or
just in case of potential in-rush current to TX2’s pin (only for better electrical protection)


Carrier board MUST be powered up later than module, and so other chips that have interface to module on your board. Boot process could be halt if not. It’s not of in-rush current but the pin status could affect system running.

BTW, especially, about your design, the UART1_TX pin’s initial status should not be changed as it is one of power-on strapping pins that you can see in chapter of ‘Strapping Pins’ in OEM DG

I meet the same problem. The Uart0 does not output any data.
Have you resoved the problem.

I also meet the same problem . The UART0 don’t output andy daya . Do have any suggest can let me fine out the problem.