In PCIe endpoint and rootpoint modes, after increasing the BAR0 SIZE, how to test the data communication?

Autonomous Machines Jetson & Embedded Systems Jetson AGX Orin
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I am using two Orin modules for RP/EP communication.
At the endpoint, code modifications were made according to the linkhttps://forums.developer.nvidia.com/t/increasing-size-of-bar0-in-endpoint-mode/232498/3.

Using the following command.

nvidia@nvidia-desktop:~/work$ dmesg |grep nv_test
[  103.016937] pci_epf_nv_test pci_epf_nv_test.0: BAR0 RAM IOVA: 0xe0000000

Currently, I cannot see the BAR0 RAM physical address, but I want to use BusyBox to perform data communication testing between two Orin devices using that address.

How can I solve this?

3

There is no update from you for a period, assuming this is not an issue any more.
Hence we are closing this topic. If need further support, please open a new one.
Thanks

Sorry for the late response, is this still an issue to support? Thanks

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