incorrect baud rate on tx2 serial console


I rigged up a serial console cable today, to try and view some messages during boot. I followed the instructions here:

However, the data that came out was consistently garbled. After a day of debugging, I scoped the TX line. One bit in the send sequence consumes 10.24uS, which works out to a baud rate of 97656 (as opposed to the expected 115200).

I noticed that in the device tree files, there’s a line under tegra186-quill-kernel-4.9.dtsi that sets:
clock-frequency = <480000000>

However since we’re running kernel 4.4, I don’t think that file is included and doesn’t have effect, and we end up with <408000000> . That ratio of increase remains the same at 1.1796x, which seems like a clue that some bug was discovered.

All of this is to say: is there a way to fix this in L4T27.1/kernel 4.4?
I tried to add that frequency specification into the existing kernel’s DTS and recompiled, but it didn’t seem to have the intended effect when I tried.

Is there an injection point that’s recommended?
I initially tried to put it in the tegra186-quill-common.dtsi under serial@3100000 but that didn’t work.

hello xtracrispy,

could you please check from the kernel driver side to confirm the baud rate was setting correctly?
please check the tegra_set_baudrate() function at below path, thanks


That driver source was not modified by myself, so it should be the default.
Within the file, I see that TEGRA_UART_DEFAULT_BAUD = 115200 (correct baud).

Remaining mystery is why it appears to be off at the physical level. I’m primarily interested in using this to debug the kernel at boot, is there any way to fix it for that purpose?

hello xtracrispy,

we had take UART analyzer to measure the J21 port on r28.1, the baud rate on scope looks correct.
could you please update your JetPack version to JetPack 3.1 for a try.