Integrated GPU cache coherence on Orin

Robotics & Edge Computing Jetson & Embedded Systems Jetson Orin Nano
1

Does Orin have bidirectional cache coherency between the CPU and integrated GPU (iGPU)? I understand that previous generations of Jetson do not, but I have seen several conflicting pieces of documentation for Orin specifically. Alternatively, does the iGPU cache pinned memory on Orin?

In the datasheet, the SCF (now Scalable Coherency Fabric) is described as providing “full-speed I/O coherence”, with no mention of applying only to the CPU’s caches. That kind of sounds like it works with all the caches in the SoC, but it’s not very clear.

CUDA for Tegra claims that there are no Jetson systems where the CPU can read from the iGPU’s cache, but maybe that hasn’t been updated for Orin?

I haven’t gotten around to running any speed tests myself, but RidgeRun’s tests seem to imply that the GPU is caching pinned memory, which I think can only happen if the CPU and GPU are fully bidirectionally cache coherent.

4

Hi,

IO coherence is available on the platform that GPU architecture greater than 7.2.
Previous Nano is sm_53 but Orin Nano is already sm_87.

IO coherence allows GPU to read the CPU cache so some memory type can be supported (ex. cudaHostRegister).
But the CPU cannot read the GPU cache since the coherency is one way.

Thanks.

5

Can you confirm whether the GPU caches pinned memory on Orin Nano or not?

6

Hi,

The document is up to date.

Pinned memory is uncached in GPU side but do cached on the CPU.
(This mean only CPU access can benefit from the cache)

Thanks.

8

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.