Hey there,
I’d like to connect Jetson Nano to an embedded audio device called Bela (https://bela.io ), via I2S. Bela is an audio cape connected to a Beaglebone Black.
So far, on Jetson I’ve enabled I2S4 using jetson-io.py. I issued the following amixer commands to match Bela’s I2S settings, from a python script:
import os
os.system( "amixer -c tegrasndt210ref cset name='I2S4 input bit format' 16" )
os.system( "amixer -c tegrasndt210ref cset name='I2S4 codec bit format' 16" )
os.system( "amixer -c tegrasndt210ref cset name='I2S4 fsync width' 16" )
os.system( "amixer -c tegrasndt210ref cset name='I2S4 Sample Rate' 44100" )
os.system( "amixer -c tegrasndt210ref cset name='I2S4 Channels' 2" )
os.system( "amixer -c tegrasndt210ref cset name='I2S4 codec frame mode' i2s" )
os.system( "amixer -c tegrasndt210ref cset name='I2S4 Playback FIFO threshold' 32" )
os.system( "amixer -c tegrasndt210ref cset name='I2S4 codec master mode' cbm-cfm" )
For Bela, I’ve followed the developer’s instructions to enable I2S (i.e., installed a device tree overlay etc). Bela will be providing the master clock.
I’ve connected the two boards as follows:
Bela P9.31 (BCLK) <> Jetson P12 (i2s4b_sclk)
Bela P9.29 (WCLK) <> Jetson P35 (i2s4b_fs)
Bela P9.27 (DOUT) >> Jetson P38 (i2s4b_din)
Bela P9.01 (GND) <> Jetson P39 (GND)
Bela P9.41 (DIN) << Jetson P40 (i2s4b_dout)
I’ve then set Bela to output a sine tone (which is both visible on Bela’s digital scope, and audible through its analog out). But when I run arecord -Dhw:tegrasndt210ref,0 ...on Jetson, I end up with a blank wav file.
Any help would be much appreciated.
kayccc
February 9, 2022, 6:05am
4
Sorry for the late response, is this still an issue to support? Thanks
Hi arhythmetic,
Need below information to help further.
Since you have used jetson-io.py, I am assuming pinmux configuration to be fine. But to confirm, pls share o/p of “cat /sys/kernel/debug/tegra_pinctrl_reg”
Are you doing this via aplay and you mean aplay(i.e jetson i2s playback via bela) is functional?
For further help, share the schematic describing source of your analog input samples, bela and Tegra connections in your record path
Thanks
Hi @kayccc , hi @atalambedu ,
many thanks for replying.
@atalambedu , running a sudo cat /sys/kernel/debug/tegra_pinctrl_reg shows the following:
Bank: 1 Reg: 0x70003000 Val: 0x00003040 -> sdmmc1_clk_pm0
Bank: 1 Reg: 0x70003004 Val: 0x00003048 -> sdmmc1_cmd_pm1
Bank: 1 Reg: 0x70003008 Val: 0x00003048 -> sdmmc1_dat3_pm2
Bank: 1 Reg: 0x7000300c Val: 0x00003048 -> sdmmc1_dat2_pm3
Bank: 1 Reg: 0x70003010 Val: 0x00003048 -> sdmmc1_dat1_pm4
Bank: 1 Reg: 0x70003014 Val: 0x00003048 -> sdmmc1_dat0_pm5
Bank: 1 Reg: 0x700032b4 Val: 0x00000000 -> sdmmc2_clk
Bank: 1 Reg: 0x700032b8 Val: 0x00000000 -> sdmmc2_clkb
Bank: 1 Reg: 0x700032bc Val: 0x00000000 -> sdmmc2_cmd
Bank: 1 Reg: 0x70003294 Val: 0x00000000 -> sdmmc2_dat0
Bank: 1 Reg: 0x70003298 Val: 0x00000000 -> sdmmc2_dat1
Bank: 1 Reg: 0x7000329c Val: 0x00000000 -> sdmmc2_dat2
Bank: 1 Reg: 0x700032a0 Val: 0x00000000 -> sdmmc2_dat3
Bank: 1 Reg: 0x700032a4 Val: 0x00000000 -> sdmmc2_dat4
Bank: 1 Reg: 0x700032a8 Val: 0x00000000 -> sdmmc2_dat5
Bank: 1 Reg: 0x700032ac Val: 0x00000000 -> sdmmc2_dat6
Bank: 1 Reg: 0x700032b0 Val: 0x00000000 -> sdmmc2_dat7
Bank: 1 Reg: 0x700032c0 Val: 0x00000000 -> sdmmc2_dqs
Bank: 1 Reg: 0x700032c4 Val: 0x00000000 -> sdmmc2_dqsb
Bank: 1 Reg: 0x7000301c Val: 0x00002040 -> sdmmc3_clk_pp0
Bank: 1 Reg: 0x70003020 Val: 0x00002048 -> sdmmc3_cmd_pp1
Bank: 1 Reg: 0x70003024 Val: 0x00002048 -> sdmmc3_dat0_pp5
Bank: 1 Reg: 0x70003028 Val: 0x00002048 -> sdmmc3_dat1_pp4
Bank: 1 Reg: 0x7000302c Val: 0x00002048 -> sdmmc3_dat2_pp3
Bank: 1 Reg: 0x70003030 Val: 0x00002048 -> sdmmc3_dat3_pp2
Bank: 1 Reg: 0x70003038 Val: 0x00000400 -> pex_l0_rst_n_pa0
Bank: 1 Reg: 0x7000303c Val: 0x00000450 -> pex_l0_clkreq_n_pa1
Bank: 1 Reg: 0x70003040 Val: 0x00000440 -> pex_wake_n_pa2
Bank: 1 Reg: 0x70003044 Val: 0x00000400 -> pex_l1_rst_n_pa3
Bank: 1 Reg: 0x70003048 Val: 0x00000440 -> pex_l1_clkreq_n_pa4
Bank: 1 Reg: 0x7000304c Val: 0x00000049 -> sata_led_active_pa5
Bank: 1 Reg: 0x7000304c Val: 0x00000049 -> pa5
Bank: 1 Reg: 0x70003050 Val: 0x0000e017 -> spi1_mosi_pc0
Bank: 1 Reg: 0x70003054 Val: 0x0000e017 -> spi1_miso_pc1
Bank: 1 Reg: 0x70003058 Val: 0x0000e017 -> spi1_sck_pc2
Bank: 1 Reg: 0x7000305c Val: 0x0000e01b -> spi1_cs0_pc3
Bank: 1 Reg: 0x70003060 Val: 0x0000e01b -> spi1_cs1_pc4
Bank: 1 Reg: 0x70003064 Val: 0x00006016 -> spi2_mosi_pb4
Bank: 1 Reg: 0x70003068 Val: 0x00006016 -> spi2_miso_pb5
Bank: 1 Reg: 0x7000306c Val: 0x00006016 -> spi2_sck_pb6
Bank: 1 Reg: 0x70003070 Val: 0x00006016 -> spi2_cs0_pb7
Bank: 1 Reg: 0x70003074 Val: 0x00006015 -> spi2_cs1_pdd0
Bank: 1 Reg: 0x70003078 Val: 0x0000e015 -> spi4_mosi_pc7
Bank: 1 Reg: 0x7000307c Val: 0x0000e015 -> spi4_miso_pd0
Bank: 1 Reg: 0x70003080 Val: 0x0000e015 -> spi4_sck_pc5
Bank: 1 Reg: 0x70003084 Val: 0x0000e015 -> spi4_cs0_pc6
Bank: 1 Reg: 0x70003088 Val: 0x00002040 -> qspi_sck_pee0
Bank: 1 Reg: 0x7000308c Val: 0x00002000 -> qspi_cs_n_pee1
Bank: 1 Reg: 0x70003090 Val: 0x00002040 -> qspi_io0_pee2
Bank: 1 Reg: 0x70003094 Val: 0x00002040 -> qspi_io1_pee3
Bank: 1 Reg: 0x70003098 Val: 0x00002040 -> qspi_io2_pee4
Bank: 1 Reg: 0x7000309c Val: 0x00002040 -> qspi_io3_pee5
Bank: 1 Reg: 0x700030a4 Val: 0x00000041 -> dmic1_clk_pe0
Bank: 1 Reg: 0x700030a8 Val: 0x00000041 -> dmic1_dat_pe1
Bank: 1 Reg: 0x700030ac Val: 0x00000041 -> dmic2_clk_pe2
Bank: 1 Reg: 0x700030b0 Val: 0x00000041 -> dmic2_dat_pe3
Bank: 1 Reg: 0x700030b4 Val: 0x00000016 -> dmic3_clk_pe4
Bank: 1 Reg: 0x700030b8 Val: 0x00000016 -> dmic3_dat_pe5
Bank: 1 Reg: 0x700030bc Val: 0x00000440 -> gen1_i2c_scl_pj1
Bank: 1 Reg: 0x700030c0 Val: 0x00000440 -> gen1_i2c_sda_pj0
Bank: 1 Reg: 0x700030c4 Val: 0x00000440 -> gen2_i2c_scl_pj2
Bank: 1 Reg: 0x700030c8 Val: 0x00000440 -> gen2_i2c_sda_pj3
Bank: 1 Reg: 0x700030cc Val: 0x00000040 -> gen3_i2c_scl_pf0
Bank: 1 Reg: 0x700030d0 Val: 0x00000040 -> gen3_i2c_sda_pf1
Bank: 1 Reg: 0x700030d4 Val: 0x00000441 -> cam_i2c_scl_ps2
Bank: 1 Reg: 0x700030d8 Val: 0x00000441 -> cam_i2c_sda_ps3
Bank: 1 Reg: 0x700030dc Val: 0x00000040 -> pwr_i2c_scl_py3
Bank: 1 Reg: 0x700030e0 Val: 0x00000040 -> pwr_i2c_sda_py4
Bank: 1 Reg: 0x700030e4 Val: 0x00000000 -> uart1_tx_pu0
Bank: 1 Reg: 0x700030e8 Val: 0x00000040 -> uart1_rx_pu1
Bank: 1 Reg: 0x700030ec Val: 0x00000015 -> uart1_rts_pu2
Bank: 1 Reg: 0x700030f0 Val: 0x00000015 -> uart1_cts_pu3
Bank: 1 Reg: 0x700030f4 Val: 0x00000000 -> uart2_tx_pg0
Bank: 1 Reg: 0x700030f8 Val: 0x00000044 -> uart2_rx_pg1
Bank: 1 Reg: 0x700030fc Val: 0x00000016 -> uart2_rts_pg2
Bank: 1 Reg: 0x70003100 Val: 0x00000016 -> uart2_cts_pg3
Bank: 1 Reg: 0x70003104 Val: 0x00000000 -> uart3_tx_pd1
Bank: 1 Reg: 0x70003108 Val: 0x00000040 -> uart3_rx_pd2
Bank: 1 Reg: 0x7000310c Val: 0x00000008 -> uart3_rts_pd3
Bank: 1 Reg: 0x70003110 Val: 0x00000048 -> uart3_cts_pd4
Bank: 1 Reg: 0x70003114 Val: 0x00000000 -> uart4_tx_pi4
Bank: 1 Reg: 0x70003118 Val: 0x00000040 -> uart4_rx_pi5
Bank: 1 Reg: 0x7000311c Val: 0x00000000 -> uart4_rts_pi6
Bank: 1 Reg: 0x70003120 Val: 0x00000048 -> uart4_cts_pi7
Bank: 1 Reg: 0x70003124 Val: 0x00006015 -> dap1_fs_pb0
Bank: 1 Reg: 0x70003128 Val: 0x00006015 -> dap1_din_pb1
Bank: 1 Reg: 0x7000312c Val: 0x00006015 -> dap1_dout_pb2
Bank: 1 Reg: 0x70003130 Val: 0x00006015 -> dap1_sclk_pb3
Bank: 1 Reg: 0x70003134 Val: 0x00006040 -> dap2_fs_paa0
Bank: 1 Reg: 0x70003138 Val: 0x00006040 -> dap2_din_paa2
Bank: 1 Reg: 0x7000313c Val: 0x00006040 -> dap2_dout_paa3
Bank: 1 Reg: 0x70003140 Val: 0x00006040 -> dap2_sclk_paa1
Bank: 1 Reg: 0x70003144 Val: 0x00000044 -> dap4_fs_pj4
Bank: 1 Reg: 0x70003148 Val: 0x00000054 -> dap4_din_pj5
Bank: 1 Reg: 0x7000314c Val: 0x00000004 -> dap4_dout_pj6
Bank: 1 Reg: 0x70003150 Val: 0x00000044 -> dap4_sclk_pj7
Bank: 1 Reg: 0x70003154 Val: 0x00000000 -> cam1_mclk_ps0
Bank: 1 Reg: 0x70003158 Val: 0x00000000 -> cam2_mclk_ps1
Bank: 1 Reg: 0x7000315c Val: 0x00000000 -> jtag_rtck
Bank: 1 Reg: 0x70003160 Val: 0x00001000 -> clk_32k_in
Bank: 1 Reg: 0x70003164 Val: 0x00000048 -> clk_32k_out_py5
Bank: 1 Reg: 0x70003168 Val: 0x00000550 -> batt_bcl
Bank: 1 Reg: 0x7000316c Val: 0x00000004 -> clk_req
Bank: 1 Reg: 0x70003170 Val: 0x00000004 -> cpu_pwr_req
Bank: 1 Reg: 0x70003174 Val: 0x00000048 -> pwr_int_n
Bank: 1 Reg: 0x70003178 Val: 0x00000000 -> shutdown
Bank: 1 Reg: 0x7000317c Val: 0x00000000 -> core_pwr_req
Bank: 1 Reg: 0x70003180 Val: 0x00000015 -> aud_mclk_pbb0
Bank: 1 Reg: 0x70003184 Val: 0x00000001 -> dvfs_pwm_pbb1
Bank: 1 Reg: 0x70003188 Val: 0x00000014 -> dvfs_clk_pbb2
Bank: 1 Reg: 0x7000318c Val: 0x00000014 -> gpio_x1_aud_pbb3
Bank: 1 Reg: 0x70003190 Val: 0x00000014 -> gpio_x3_aud_pbb4
Bank: 1 Reg: 0x70003194 Val: 0x00000500 -> pcc7
Bank: 1 Reg: 0x70003198 Val: 0x00000540 -> hdmi_cec_pcc0
Bank: 1 Reg: 0x7000319c Val: 0x00000140 -> hdmi_int_dp_hpd_pcc1
Bank: 1 Reg: 0x700031a0 Val: 0x00000015 -> spdif_out_pcc2
Bank: 1 Reg: 0x700031a4 Val: 0x00000015 -> spdif_in_pcc3
Bank: 1 Reg: 0x700031a8 Val: 0x00000149 -> usb_vbus_en0_pcc4
Bank: 1 Reg: 0x700031ac Val: 0x00000115 -> usb_vbus_en1_pcc5
Bank: 1 Reg: 0x700031b0 Val: 0x00000040 -> dp_hpd0_pcc6
Bank: 1 Reg: 0x700031b4 Val: 0x00000000 -> wifi_en_ph0
Bank: 1 Reg: 0x700031b8 Val: 0x00000014 -> wifi_rst_ph1
Bank: 1 Reg: 0x700031bc Val: 0x00000044 -> wifi_wake_ap_ph2
Bank: 1 Reg: 0x700031c0 Val: 0x00000000 -> ap_wake_bt_ph3
Bank: 1 Reg: 0x700031c4 Val: 0x00000000 -> bt_rst_ph4
Bank: 1 Reg: 0x700031c8 Val: 0x00000048 -> bt_wake_ap_ph5
Bank: 1 Reg: 0x700031cc Val: 0x00000000 -> ap_wake_nfc_ph7
Bank: 1 Reg: 0x700031d0 Val: 0x00000000 -> nfc_en_pi0
Bank: 1 Reg: 0x700031d4 Val: 0x00000040 -> nfc_int_pi1
Bank: 1 Reg: 0x700031d8 Val: 0x00000000 -> gps_en_pi2
Bank: 1 Reg: 0x700031dc Val: 0x00000014 -> gps_rst_pi3
Bank: 1 Reg: 0x700031e0 Val: 0x00000015 -> cam_rst_ps4
Bank: 1 Reg: 0x700031e4 Val: 0x00000016 -> cam_af_en_ps5
Bank: 1 Reg: 0x700031e8 Val: 0x00000016 -> cam_flash_en_ps6
Bank: 1 Reg: 0x700031ec Val: 0x00000001 -> cam1_pwdn_ps7
Bank: 1 Reg: 0x700031f0 Val: 0x00000001 -> cam2_pwdn_pt0
Bank: 1 Reg: 0x700031f4 Val: 0x00000015 -> cam1_strobe_pt1
Bank: 1 Reg: 0x700031f8 Val: 0x00000015 -> lcd_te_py2
Bank: 1 Reg: 0x700031fc Val: 0x00000017 -> lcd_bl_pwm_pv0
Bank: 1 Reg: 0x70003200 Val: 0x00000040 -> lcd_bl_en_pv1
Bank: 1 Reg: 0x70003204 Val: 0x00000014 -> lcd_rst_pv2
Bank: 1 Reg: 0x70003208 Val: 0x00000015 -> lcd_gpio1_pv3
Bank: 1 Reg: 0x7000320c Val: 0x00000001 -> lcd_gpio2_pv4
Bank: 1 Reg: 0x70003210 Val: 0x00000014 -> ap_ready_pv5
Bank: 1 Reg: 0x70003214 Val: 0x00000014 -> touch_rst_pv6
Bank: 1 Reg: 0x70003218 Val: 0x00000015 -> touch_clk_pv7
Bank: 1 Reg: 0x7000321c Val: 0x00000014 -> modem_wake_ap_px0
Bank: 1 Reg: 0x70003220 Val: 0x00000014 -> touch_int_px1
Bank: 1 Reg: 0x70003224 Val: 0x00000014 -> motion_int_px2
Bank: 1 Reg: 0x70003228 Val: 0x00000000 -> als_prox_int_px3
Bank: 1 Reg: 0x7000322c Val: 0x00000048 -> temp_alert_px4
Bank: 1 Reg: 0x70003230 Val: 0x00000048 -> button_power_on_px5
Bank: 1 Reg: 0x70003234 Val: 0x00000048 -> button_vol_up_px6
Bank: 1 Reg: 0x70003238 Val: 0x00000014 -> button_vol_down_px7
Bank: 1 Reg: 0x7000323c Val: 0x00000014 -> button_slide_sw_py0
Bank: 1 Reg: 0x70003240 Val: 0x00000048 -> button_home_py1
Bank: 1 Reg: 0x70003244 Val: 0x00000001 -> pa6
Bank: 1 Reg: 0x70003248 Val: 0x00000014 -> pe6
Bank: 1 Reg: 0x7000324c Val: 0x00000002 -> pe7
Bank: 1 Reg: 0x70003250 Val: 0x00000048 -> ph6
Bank: 1 Reg: 0x70003254 Val: 0x00006016 -> pk0
Bank: 1 Reg: 0x70003258 Val: 0x00006016 -> pk1
Bank: 1 Reg: 0x7000325c Val: 0x00006016 -> pk2
Bank: 1 Reg: 0x70003260 Val: 0x00006016 -> pk3
Bank: 1 Reg: 0x70003264 Val: 0x00006015 -> pk4
Bank: 1 Reg: 0x70003268 Val: 0x00006015 -> pk5
Bank: 1 Reg: 0x7000326c Val: 0x00006015 -> pk6
Bank: 1 Reg: 0x70003270 Val: 0x00006015 -> pk7
Bank: 1 Reg: 0x70003274 Val: 0x00006014 -> pl0
Bank: 1 Reg: 0x70003278 Val: 0x00006015 -> pl1
Bank: 1 Reg: 0x7000327c Val: 0x00000015 -> pz0
Bank: 1 Reg: 0x70003280 Val: 0x00000049 -> pz1
Bank: 1 Reg: 0x70003284 Val: 0x0000004a -> pz2
Bank: 1 Reg: 0x70003288 Val: 0x00000001 -> pz3
Bank: 1 Reg: 0x7000328c Val: 0x00000015 -> pz4
Bank: 1 Reg: 0x70003290 Val: 0x00000048 -> pz5
Bank: 0 Reg: 0x700009c0 Val: 0x00000000 -> drive_pa6
Bank: 0 Reg: 0x700009c4 Val: 0x00000000 -> drive_pcc7
Bank: 0 Reg: 0x700009c8 Val: 0x00000000 -> drive_pe6
Bank: 0 Reg: 0x700009cc Val: 0x00000000 -> drive_pe7
Bank: 0 Reg: 0x700009d0 Val: 0x00000000 -> drive_ph6
Bank: 0 Reg: 0x700009d4 Val: 0x00000000 -> drive_pk0
Bank: 0 Reg: 0x700009d8 Val: 0x00000000 -> drive_pk1
Bank: 0 Reg: 0x700009dc Val: 0x00000000 -> drive_pk2
Bank: 0 Reg: 0x700009e0 Val: 0x00000000 -> drive_pk3
Bank: 0 Reg: 0x700009e4 Val: 0x00000000 -> drive_pk4
Bank: 0 Reg: 0x700009e8 Val: 0x00000000 -> drive_pk5
Bank: 0 Reg: 0x700009ec Val: 0x00000000 -> drive_pk6
Bank: 0 Reg: 0x700009f0 Val: 0x00000000 -> drive_pk7
Bank: 0 Reg: 0x700009f4 Val: 0x00000000 -> drive_pl0
Bank: 0 Reg: 0x700009f8 Val: 0x00000000 -> drive_pl1
Bank: 0 Reg: 0x700009fc Val: 0x01010000 -> drive_pz0
Bank: 0 Reg: 0x70000a00 Val: 0x01010000 -> drive_pz1
Bank: 0 Reg: 0x70000a04 Val: 0x00000000 -> drive_pz2
Bank: 0 Reg: 0x70000a08 Val: 0x00000000 -> drive_pz3
Bank: 0 Reg: 0x70000a0c Val: 0x00000000 -> drive_pz4
Bank: 0 Reg: 0x70000a10 Val: 0x00000000 -> drive_pz5
Bank: 0 Reg: 0x70000a98 Val: 0x51115000 -> drive_sdmmc1
Bank: 0 Reg: 0x70000a9c Val: 0x07ffd040 -> drive_sdmmc2
Bank: 0 Reg: 0x70000ab0 Val: 0x51212000 -> drive_sdmmc3
Bank: 0 Reg: 0x70000ab4 Val: 0x07ffd040 -> drive_sdmmc4
Bank: 0 Reg: 0x70000b70 Val: 0x00000001 -> drive_qspi_comp_control
Bank: 0 Reg: 0x70000b78 Val: 0x00000001 -> drive_qspi_lpbk_control
Bank: 0 Reg: 0x70000a78 Val: 0x00808000 -> drive_qspi_comp
hmm, not exactly. Bela produces the I2S clocks as well as a sinewave signal; these are all sent to Jetson (via I2S). On Jetson I call arecord -D hw:tegrasndt210ref,0 -c2 -r44100 -f S16_LE test.wav expecting that the generated test.wav would contain the sine tone, however it comes up blank.
Actually, I noticed a possible bug with Bela when in I2S mode (i.e., running a simple project where the analog audio input is copied to the analog audio out produces white noise, even with no analog or I2S source connected). I have informed the developers and will report back soon.
Apologies but I’m still a bit clueless with electronics - could you please elaborate?
Hi arythmetic,
Apologies for the late reply. I see that pinmux setting is not fine. Could you redo the pinmux changes as per guide at link after modifying pinmux sheet as shown in image
Thanks
1 Like
system
March 2, 2022, 6:40am
12
This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.
