Interlaced video capture

[jiakai1000]

Hi,
My TX2-NX can capture interlaced video from ADV7281-M now, but the field order sometimes may be wrong:
the wrong order:

the right order:

1. How can I get the current field ID(even or odd) ?
   Should I modify the driver code of tegra_channel_capture_frame_single_thread() in drivers/media/platform/tegra/camera/vi/vi4_fops.c ?

2. In https://ez.analog.com/video/f/q-a/9630/what-video-format-is-the-mipi-csi-2-output-from-adv728x-parts says:

 in interlaced mode odd frames have one extra line than even frames.

so how can I get the actual line count in driver code?

3. or how can I get the frame number in frame start/end packets when one frame is captured?

Thanks

[JerryChang]

hello jiakai1000,

please refer to Topic 73584, and Topic 109266 we don’t support interlaced streams.

[jiakai1000]

hello,
interlaced capture is supported, I have fixed the bug, below is patch:

diff --git a/drivers/media/platform/tegra/camera/vi/vi4_fops.c b/drivers/media/platform/tegra/camera/vi/vi4_fops.c
index 7b19eb1d3..b2866b4f5 100644
--- a/drivers/media/platform/tegra/camera/vi/vi4_fops.c
+++ b/drivers/media/platform/tegra/camera/vi/vi4_fops.c
                for (i = 0; i < chan->valid_ports; i++)
@@ -620,11 +647,19 @@ static int tegra_channel_capture_frame_single_thread(
                if (chan->capture_state == CAPTURE_IDLE)
                        chan->capture_state = CAPTURE_GOOD;
                spin_unlock_irqrestore(&chan->capture_state_lock, flags);
+
+               if (chan->is_interlaced && chan->interlace_type == Interleaved) {
+                       if (j == 0 && vb->sequence != BOTTOM_FIELD) {
+                               dev_info(chan->vi->dev, "%s: adjust interlaced field\n", __func__);
+                               j--;
+                       }
+               }
        }