Invalid configuration output pin in custom development board

[asfsdgag]

hello:
my Core board baord is Jetson Orin NX 16GB-DRAM, kernel version is:

root@tegra-ubuntu:/home/yz/nfs# uname -a
Linux tegra-ubuntu 5.10.120-rt70-tegra #6 SMP PREEMPT RT Tue May 27 19:24:22 CST 2025 aarch64 aarch64 aarch64 GNU/Linux

 I change pin set Configuration Features as blow picture in excel file:

Generate and modify device tree：

pinmux@2430000{
		pinctrl-names = "default";
		pinctrl-0 = <&exp_header_pinmux>;
		exp_header_pinmux:header-pinmux {
               soc_gpio25_pp6 {
				nvidia,pins = "soc_gpio25_pp6";
				nvidia,function = "gpio";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};
              };
	};

	i2c@c240000{
		status = "okay";  // 启用该设备	
		dlp3010@1B {
        	compatible = "bopixel,dlp3010";  // 设备的兼容性字符串
       		reg = <0x1B>;  					// I2C 地址为 0x36
			dlp-id = <0>;
			enable-gpios =  <&tegra_main_gpio  TEGRA234_MAIN_GPIO(P, 6)  GPIO_ACTIVE_HIGH>; //控制dlp的上电开关
			dlp-name = "dlp3010_0"; 		// 指定设备节点名称
			status = "okay";  				// 启用该设备
			clock-frequency = <100000>;  // Set speed to 400kH
    	};
	};

my drive code is :

static struct dlp_data{
    struct i2c_client   *client;
    struct gpio_desc   *enable_gpio;
    struct class 	    *dlp_class;
    struct device 	    *dlp_device;
    struct cdev         cdev;
    u8                  index;
    int                 major;
    dev_t               dev_number;
    char                dev_name[15];
}g_dlp[DLP_MAX_DEVICES];
 dlpData->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
    if (IS_ERR(dlpData->enable_gpio)) {
		vc_err(dev, "Failed to get enable-gpios gpio\n");
		return PTR_ERR(dlpData->enable_gpio);
	}
    gpiod_set_value_cansleep(dlpData->enable_gpio, 1);

The driver code did not report any errors，But the pin test has always been at a low level, not a 1.8V voltage。
May I ask what else I need to do？

[SivaRamaKrishnaNV]

Moving to Jetson Orin NX forum

[KevinFFF]

Hi asfsdgag,

@asfsdgag

I change pin set Configuration Features as blow picture in excel file:

The pinmux/gpio dtsi generated from pinmux spreadsheet are loaded in early-boot(MB1).
You should just refer to the instruction in Jetson Orin NX and Nano Series — Jetson Linux Developer Guide documentation to apply the change.

As my understanding, it should be specified in gpio-output-high of gpio dtsi so that it could be configured as High by default.

@asfsdgag

my drive code is :

Do you control PP.06 in your driver?
If so, is there any error reporting in dmesg?

[asfsdgag]

hi KevinFFE:
very thank you, I solved this problem in your way！