Thank you for your reply. I have followed the documentation you mentioned, while developing the driver. I have experience in PCIe DMA driver development.
And for your information, driver works in Ubuntu x86 PC. The problem is that it doesn’t work on TX2 board, probably because of ARM64 architecture, SMMU etc. We have solved some other ARM related problems like cache coherency. Since this one seems to be related TX2 SMMU architecture, I request your guidance in solving the same. I am also trying to debug it, with the help of TRM and instrumentation.
There are a few points I want to bring to your notice:
- The problem seems to be solved, if I disable SMMU. However, I obviously want to bring DMA up with SMMU
- The problem occurs randomly. Sometimes,context fault doesn't show up, if I reboot the board. When the fault happens, the send and received DMA buffers in my DMA loop-back program mismatch.
- The problem doesn't occur in x86, which suggests the issue is not with the Xilinx PCIe IP/ device I am using.
- I see the issue in many other posts. If possible, could you please try to replicate it at your side?
- Could you please send a reference DMA code which you might have used for testing SMMU with L4T 32+? That would be really helpful.
Thanks in advance,