Is signal->mipi_clock.val a parameter for configuring mipi rate?

Environment: jetpack6.0(GA) The access solution is the deserializer solution, and the deserializer is max96712,Our current camera uses Cphy, and the mipi rate is 1.1g symbol/s,

Linux_for_Tegra/source/nvidia-oot/drivers/media/platform/tegra/camera/sensor_common.c

rate = rate * depth / signal->num_lanes;

if (signal->phy_mode == CSI_PHY_MODE_DPHY) {
	/* MIPI clock rate */
	signal->mipi_clock.val = rate / 2;
} else if (signal->phy_mode == CSI_PHY_MODE_CPHY) {
	/* Symbol rate */
	signal->mipi_clock.val = rate * 7 / 16;
} else {
	/* Data rate */
	signal->mipi_clock.val = rate;
}

If rate is not an integer multiple of 16, it cannot be divided cleanly, which may cause some deviation.So I want to confirm whether the mipi clock here is the setting of the mipi rate by orin.

It’s depend on pix_clk_zh or serdes_pix_clk_hz.

Thanks

I know this code. Whichever of the serdes and camera rates is larger is selected.My deserializer is currently 1.1g/lane, and no matter how I reverse the value of serdes_pix_clk_hz, I can’t get it to an integer. My current idea is to directly write this value in the program as 1.1g.

I think don’t need to exactly equal to 1.1G set the serdes_pix_clk to calculate > 1.1G should be allowed.

Wouldn’t this cause instability?

I don’t think so.