Is the TX2 support SPI1_CS1 (E13) pin controller function?

Hell Sir,

I have a problem because I used SPI1 CS1 (E13) to other SPI slave device in the TX2, but I do not use SPI1_CS1 pin, and this pin always too low.

I tried many methods (e.g. reconfigure pinmix changing… etc), but the SPI1_CS1 (E13) always too low.

SDK version : JetPack 3.3

How do I use it SPI1_CS1 pin ?

SPI1_CS0 pin …> this is okay.
SPI1_CS1 pin …> this is not okay.

SPI1_CLK/MOSI/MISO/CS0 change spi mode, but I do not know CS1 change to SPI_CS1.

tegra_gpio: gpio@2200000 {
// HW spi1 (spi3 for SW)
spi1_enable {
status = “okay”;
label = “enable spi1 function”;
gpio-hog;
function;
gpios = <TEGRA_MAIN_GPIO(N, 3) 0 TEGRA_MAIN_GPIO(N, 4) 0 TEGRA_MAIN_GPIO(N, 5) 0 TEGRA_MAIN_GPIO(N, 6) 0>;
};
};

// spi3
spi@3240000 {
status = “okay”;
// HW spi1.0 (spi3 for SW)
spidev@0 {
compatible = “spidev”;
reg = <0>;
spi-max-frequency = <25000000>;
nvidia,enable-hw-based-cs;
nvidia,cs-setup-clk-count = <0x1e>;
nvidia,cs-hold-clk-count = <0x1e>;
nvidia,rx-clk-tap-delay = <0x1f>;
nvidia,tx-clk-tap-delay = <0x0>;
};

// HW spi1.1 (spi3 for SW)
spidev@1 {
compatible = “spidev”;
reg = <1>;
spi-max-frequency=<25000000>;
nvidia,enable-hw-based-cs;
nvidia,cs-setup-clk-count = <0x1e>;
nvidia,cs-hold-clk-count = <0x1e>;
nvidia,rx-clk-tap-delay = <0x1f>;
nvidia,tx-clk-tap-delay = <0x0>;
};
};

The same with below topic.

https://devtalk.nvidia.com/default/topic/1001608