For a special application using an AGX Orin connected to a CSI camera, we would like to disable particular steps of the image processing pipeline, running in the ISP.
Or maybe even define/program our own processing blocks - in order to offload the CPU/GPU.
Ultimately, we would like to capture the data from the ISP using something like arguscamerasrc (maybe customized to support the resulting image format) and feed it into gstreamer.
For now, we have found a headerfile (/nvidia/include/soc/tegra/camrtc-capture.h) in the Nvidia linux kernel sources, referring to individual steps of the processing, namely:
#define ISP5BLOCK_ENABLED_PRU_OUTLIER_REJECTION MK_BIT32(0)
#define ISP5BLOCK_ENABLED_PRU_STATS MK_BIT32(1)
#define ISP5BLOCK_ENABLED_PRU_HDR MK_BIT32(2)
#define ISP6BLOCK_ENABLED_PRU_RAW24_HIST MK_BIT32(3) /* ISP6 */
#define ISP5BLOCK_ENABLED_AP_DEMOSAIC MK_BIT32(4)
#define ISP5BLOCK_ENABLED_AP_CAR MK_BIT32(5)
#define ISP5BLOCK_ENABLED_AP_LTM_MODIFY MK_BIT32(6)
#define ISP5BLOCK_ENABLED_AP_LTM_STATS MK_BIT32(7)
#define ISP5BLOCK_ENABLED_AP_FOCUS_METRIC MK_BIT32(8)
#define ISP5BLOCK_ENABLED_FLICKERBAND MK_BIT32(9)
#define ISP5BLOCK_ENABLED_HISTOGRAM0 MK_BIT32(10)
#define ISP5BLOCK_ENABLED_HISTOGRAM1 MK_BIT32(11)
#define ISP5BLOCK_ENABLED_DOWNSCALER0_HOR MK_BIT32(12)
#define ISP5BLOCK_ENABLED_DOWNSCALER0_VERT MK_BIT32(13)
#define ISP5BLOCK_ENABLED_DOWNSCALER1_HOR MK_BIT32(14)
#define ISP5BLOCK_ENABLED_DOWNSCALER1_VERT MK_BIT32(15)
#define ISP5BLOCK_ENABLED_DOWNSCALER2_HOR MK_BIT32(16)
#define ISP5BLOCK_ENABLED_DOWNSCALER2_VERT MK_BIT32(17)
#define ISP5BLOCK_ENABLED_SHARPEN0 MK_BIT32(18)
#define ISP5BLOCK_ENABLED_SHARPEN1 MK_BIT32(19)
#define ISP5BLOCK_ENABLED_LAC0_REGION0 MK_BIT32(20)
#define ISP5BLOCK_ENABLED_LAC0_REGION1 MK_BIT32(21)
#define ISP5BLOCK_ENABLED_LAC0_REGION2 MK_BIT32(22)
#define ISP5BLOCK_ENABLED_LAC0_REGION3 MK_BIT32(23)
#define ISP5BLOCK_ENABLED_LAC1_REGION0 MK_BIT32(24)
#define ISP5BLOCK_ENABLED_LAC1_REGION1 MK_BIT32(25)
#define ISP5BLOCK_ENABLED_LAC1_REGION2 MK_BIT32(26)
#define ISP5BLOCK_ENABLED_LAC1_REGION3 MK_BIT32(27)
But these defines are not used anywhere. They should probably be used in the field enables_config of the struct isp5_program, but we don’t find any references to this struct in the kernel either…
Can you guide us in the right direction?
The header file mentions a reference: ISP_Microcode.docx - where can we find this document?
Thank you