Issue accessing SNOR registers in Tegra 2

Hi,

I’m running a 3.1.10 Kernel (from Toradex fork) on a Tegra 2 CPU. I’m porting a driver I wrote which handles an interface between Tegra 2 and an FPGA through the GMI(SNOR) interface.

First thing the driver does when inserted is to configure SNOR registers. It happens that I can read them (and the value read is coherent with the TRM) but when I write a new configuration, the value remains unchanged in the next read.

I’m using the following mem management kernel functions:

  • request_mem_region to allocate space
  • ioremap for each register (I run iounmap once finished)
  • ioread32 to read. This call works perfect, for example, I read 0x76543210 from SNOR_CS_MUX_CFG_0 register.
  • iowrite32 to write. This call is not working somehow. The address used to write is the same as the one used to read, but when I read the register after having written, value remains unchanged.
  • I’m using compiler barriers (i.e. rmb() wmb()) to avoid reordering and optimizations.

I’ve searched through the TRM and found nothing that can shed some light on this. I’ve googled this issue as well with no success.

Any ideas really appreciated. Thanks you for your time.

Hi,

I have the same problem.
Please tell me you solve this problem? If so, how?

Thanks you for your time.

With the help of ppra and lemagicien in a private conversation learned the solution.

First we need to rewrite the register:

5.4.6 CLK_RST_CONTROLLER_CLK_OUT_ENB_H_0
Offset: 014h | Read/Write: R/W | Reset: 0b0000000x00000000000001001000x000

bit 10 = CLK_ENB_SNOR: Enable clock to NOR Flash Controller.
base adress: 6000 6000

The default software from Toradeks it is disabled

thanks for pointing out this hole in our docs - we’ll work to address this issue.