Issue Generating .ko File for tc358743 Module on Jetson Xavier NX with L4T 32.6.1

From your dmesg, it seems USB working as expected.

[    0.784192] gpiochip_setup_dev: registered GPIOs 288 to 511 on device: gpiochip0 (tegra-gpio)

From this log, you would know gpio-XXX for main gpio is counting from 288.

Hi Kevin,

Sorry for my ignorance. Actually, I am new to this field. Could you please explain in detail ?

You said that device tree pin definition and that tegra194 mapping is not same. So, the device tree pin definition is purely dependent on the hardware pinmux right ? especially the soc pin which is PQ.03.

How I can connect your answer with my question ? I did not get it ?

Best Regards,

Yes, they are different.
The gpio number from tegra194-gpio.h is used for device tree.
The gpio number in /sys/kernel/debug/gpio is determined by the registered order. (not every bus with 8 instances)

Could you clarify what’s you issue now?

Hi Kevin,
But I understood your previous answer.

In my device tree I defined this macro by this
define CAM0_RST_L TEGRA194_MAIN_GPIO(Q, 3)
so this tegra194_main_gpio is for device tree right ?

But, in this path of nx bsp source package → source/Linux_for_Tegra/source/public/hardware/nvidia/soc/t19x/kernel-include/dt-bindings/gpio/. There is a file called tegra194-gpio.h. As per this file only, I calculated my pin as 131. But this pin is 124 as per the schematic.

Could you please tell me why this file ?

Best Regards,

TEGRA194_MAIN_GPIO is the macro from tegra194-gpio.h to calculate the pin value for device tree.
tegra194_main_gpio is the address and node for main gpio in device tree.

If you mean the 124 in pinmux spreadsheet (or schematic), it is no meaning.

You could just map them from pinmux spreadsheet.
For GPIO02, you would know it is also GPIO3_PQ.03 which you are using now.

Hi kevinFFF,

I understood your statement.

I have some doubt, I did gpio functionality change in my device tree (default functionality is high-input). My conversion in device tree is to low-output.
This configuration done in device tree. This is the only method to change the pin functionality ?
Is there any easy program to control (change the configuration) the particular gpio pin in jetson xavier nx from host ??

Could you please clarify these doubts.

Best Regards,

For the default state, you could change it through modifying the pinmux dtsi or writing the pinmux register.
In runtime, you could also use sysfs method to control its input/output and high/low.

Hi kevinFFF,

I gone through this link GPIO Programming: Using the sysfs Interface | ICS for sysfs method.
But, in my case which gpio pin number to be export ?
soc gpio is 23 and carrier board is 124. Gpio pin net name is GPIO02.

Which is the suitable one ? Otherwise all other process regarding this sysfs procedures are understood.

Best Regards,

If you want to use sysfs to control GPIO02 (SOC_GPIO23, GPIO3_PQ.03), please run the following command to check its gpio number first.

$ sudo cat /sys/kernel/debug/gpio|grep -i PQ.03
 gpio-438 (PQ.03               )

=> It is 438.

Please use the following commands to export this pin.

$ sudo su
# echo 438 > /sys/class/gpio/export
# cd /sys/class/gpio/PQ.03

Hi KevinFFF,

In my device tree, I set the GPIO functionality to output and low. By default, it is configured as input and high. I want to change the pin value from low to high using a sysfs command. Will this overwrite the pin functionality?

Best Regards,

It seems not expected result. Have you checked you configure the device tree for pinmux correctly?

With sysfs command, it would just effective in runtime and will recover the state after reboot.

From you original post, it seems you want to use the pin for camera.
Could you help to clarify your current issue?

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