Issue in running multi cell test

Accelerated Computing Aerial Forum
1

Hi I have problem running end to end test using cli below.

sudo -E /opt/nvidia/cuBB/build/cuPHY-CP/cuphycontroller/examples/cuphycontroller_scf F08 CG1
sudo -E  /opt/nvidia/cuBB/build/cuPHY-CP/ru-emulator/ru_emulator/ru_emulator F08 2C 59
sudo -E  /opt/nvidia/cuBB/build/cuPHY-CP/testMAC/testMAC/test_mac F08 2C 59

I have got error on terminal running cuphycontroller below.

05:28:37.859923 WRN 7676 0 [DRV.API] Cell active, cannot update config!
05:28:37.860612 ERR 7676 0 [AERIAL_CUPHYDRV_API_EVENT] [L2A.MODULE] Failed to update cell 2 dst_mac=9c:63:c0:d8:eb:9a vlan_tci=0xE002
05:28:37.860617 ERR 7676 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] l1_cell_update_cell_config: Could't getCellByMplaneId 
05:28:37.860618 ERR 7676 0 [AERIAL_CUPHYDRV_API_EVENT] [L2A.MODULE] Failed to update cell 3 dst_mac=9c:63:c0:d8:eb:9a vlan_tci=0xE002
05:28:45.880020 WRN timer_thread 0 [SCF.PHY] Cell  0 | DL    0.00 Mbps    0 Slots | UL    0.00 Mbps    0 Slots CRC   0 (     0) | Tick 0
05:28:45.880021 WRN timer_thread 0 [SCF.PHY] Cell  1 | DL    0.00 Mbps    0 Slots | UL    0.00 Mbps    0 Slots CRC   0 (     0) | Tick 0
05:28:45.886490 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 0.15 No available Aggr PUSCH objects
05:28:45.886510 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 0.15 for cell-id 0
05:28:45.886512 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 0.15 for cell-id 1
05:28:45.887141 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730266125886664000 current_time 1730266125887141407 start_ch_task_time 1730266125886000000
05:28:45.887142 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 2,Error detection too late. No UL Task Abort!
05:28:45.887143 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=0 slot=14 for msg_id=0x07
05:28:45.887148 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730266125886664000 current_time 1730266125887148351 start_ch_task_time 1730266125886000000
05:28:45.887148 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 2,Error detection too late. No UL Task Abort!
05:28:45.887148 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=0 slot=14 for msg_id=0x07
05:28:45.888827 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 2, SFN 0 Slot 14 Order kernel timeout error or Exit error for cell index 0 Dyn index 0!
05:28:45.888829 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 2, SFN 0 Slot 14 Order kernel timeout error or Exit error for cell index 1 Dyn index 1!
05:28:45.891488 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 1.5 No available Aggr PUSCH objects
05:28:45.891498 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 1.5 for cell-id 0
05:28:45.891507 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 1.5 for cell-id 1
05:28:45.896487 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 1.15 No available Aggr PUSCH objects
05:28:45.896497 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 1.15 for cell-id 0
05:28:45.896499 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 1.15 for cell-id 1
05:28:45.897095 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 2, SFN 0 Slot 14 PUSCH Pre Early Harq Wait kernel timeout!
05:28:45.897144 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 2, SFN 0 Slot 14 PUSCH Post Early Harq Wait kernel timeout!
05:28:45.897147 WRN UlPhyDriver06 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730266125891664000 current_time 1730266125897147628 start_ch_task_time 1730266125891000000
05:28:45.897148 ERR UlPhyDriver06 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 4,Error detection too late. No UL Task Abort!
05:28:45.897148 ERR UlPhyDriver06 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=1 slot=4 for msg_id=0x07
05:28:45.897153 WRN UlPhyDriver06 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730266125891664000 current_time 1730266125897153356 start_ch_task_time 1730266125891000000
05:28:45.897153 ERR UlPhyDriver06 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 4,Error detection too late. No UL Task Abort!
05:28:45.897153 ERR UlPhyDriver06 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=1 slot=4 for msg_id=0x07
05:28:45.900227 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 4, SFN 1 Slot 4 Order kernel timeout error or Exit error for cell index 0 Dyn index 0!
05:28:45.900228 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 4, SFN 1 Slot 4 Order kernel timeout error or Exit error for cell index 1 Dyn index 1!
05:28:45.901487 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 2.5 No available Aggr PUSCH objects
05:28:45.901496 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 2.5 for cell-id 0
05:28:45.901505 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 2.5 for cell-id 1
05:28:45.902339 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 4, SFN 1 Slot 4 PUSCH Pre Early Harq Wait kernel timeout!
05:28:45.902387 WRN UlPhyDriver06 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730266125896664000 current_time 1730266125902386991 start_ch_task_time 1730266125896000000
05:28:45.902387 ERR UlPhyDriver06 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 6,Error detection too late. No UL Task Abort!
05:28:45.902387 ERR UlPhyDriver06 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=1 slot=14 for msg_id=0x07
05:28:45.902392 WRN UlPhyDriver06 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730266125896664000 current_time 1730266125902392175 start_ch_task_time 1730266125896000000
05:28:45.902392 ERR UlPhyDriver06 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 6,Error detection too late. No UL Task Abort!
05:28:45.902392 ERR UlPhyDriver06 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=1 slot=14 for msg_id=0x07
05:28:45.905460 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 6, SFN 1 Slot 14 Order kernel timeout error or Exit error for cell index 0 Dyn index 0!
05:28:45.905461 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 6, SFN 1 Slot 14 Order kernel timeout error or Exit error for cell index 1 Dyn index 1!
05:28:45.906488 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 2.15 No available Aggr PUSCH objects
05:28:45.906497 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 2.15 for cell-id 0
05:28:45.906499 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 2.15 for cell-id 1
05:28:45.907586 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 6, SFN 1 Slot 14 PUSCH Pre Early Harq Wait kernel timeout!
05:28:45.907631 WRN UlPhyDriver06 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730266125901664000 current_time 1730266125907631795 start_ch_task_time 1730266125901000000
05:28:45.907632 ERR UlPhyDriver06 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 8,Error detection too late. No UL Task Abort!
05:28:45.907632 ERR UlPhyDriver06 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=2 slot=4 for msg_id=0x07
05:28:45.907637 WRN UlPhyDriver06 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730266125901664000 current_time 1730266125907637043 start_ch_task_time 1730266125901000000
05:28:45.907637 ERR UlPhyDriver06 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 8,Error detection too late. No UL Task Abort!
05:28:45.907637 ERR UlPhyDriver06 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=2 slot=4 for msg_id=0x07
05:28:45.910707 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 8, SFN 2 Slot 4 Order kernel timeout error or Exit error for cell index 0 Dyn index 0!
05:28:45.910708 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 8, SFN 2 Slot 4 Order kernel timeout error or Exit error for cell index 1 Dyn index 1!
05:28:45.911486 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 3.5 No available Aggr PUSCH objects

I got error on terminal session running ru emulator

05:28:45.882677 WRN 58 0 [RU] PDCCH_DL Complete Cell 1 3GPP slot 6 F0 S3 S0 validation error
05:28:45.882683 WRN 58 0 [RU] PDCCH_UL Complete Cell 1 3GPP slot 6 F0 S3 S0 validation error
05:28:45.882690 WRN 58 0 [RU] PDCCH_UL Complete Cell 1 3GPP slot 6 F0 S3 S0 validation error
05:28:45.882990 WRN 55 0 [RU] PDSCH Complete Cell 0 3GPP slot 6 F0 S3 S0 Payload Validation ERROR
05:28:45.882993 WRN 56 0 [RU] PDSCH Complete Cell 1 3GPP slot 6 F0 S3 S0 Payload Validation ERROR
05:28:45.883032 WRN 53 0 [RU] CSI-RS Complete Cell 0 3GPP slot 6 F0 S3 S0 Validation ERROR
05:28:45.883166 WRN 59 0 [RU] PDCCH_UL Complete Cell 1 3GPP slot 7 F0 S3 S1 validation error
05:28:45.883169 WRN 56 0 [RU] PDCCH_DL Complete Cell 1 3GPP slot 7 F0 S3 S1 validation error
05:28:45.883172 WRN 59 0 [RU] PDCCH_UL Complete Cell 1 3GPP slot 7 F0 S3 S1 validation error
05:28:45.883224 WRN 50 0 [RU] pdsch_remask_mismatch: 3, csirs_remask_mismatch: 3
05:28:45.883225 WRN 50 0 [RU] cell_index: 0, symbol: 6, c_plane_info.tv_index 10 , remask_idx_base 1638 
05:28:45.883226 WRN 50 0 [RU] section_id: 39, startPrbc: 45, numPrbc: 45, expected csirs_remask 0x888, received csirs_remask 0xfff, expected pdsch_remask 0x777, received pdsch_remask 0xfff 
05:28:45.883226 WRN 50 0 [RU] section_id: 41, startPrbc: 135, numPrbc: 45, expected csirs_remask 0x888, received csirs_remask 0xfff, expected pdsch_remask 0x777, received pdsch_remask 0xfff 
05:28:45.883226 WRN 50 0 [RU] section_id: 43, startPrbc: 225, numPrbc: 45, expected csirs_remask 0x888, received csirs_remask 0xfff, expected pdsch_remask 0x777, received pdsch_remask 0xfff 
05:28:45.883251 WRN 51 0 [RU] pdsch_remask_mismatch: 3, csirs_remask_mismatch: 3
05:28:45.883252 WRN 51 0 [RU] cell_index: 1, symbol: 5, c_plane_info.tv_index 22 , remask_idx_base 1365 
05:28:45.883252 WRN 51 0 [RU] section_id: 32, startPrbc: 45, numPrbc: 45, expected csirs_remask 0x888, received csirs_remask 0xfff, expected pdsch_remask 0x777, received pdsch_remask 0xfff 
05:28:45.883252 WRN 51 0 [RU] section_id: 34, startPrbc: 135, numPrbc: 45, expected csirs_remask 0x888, received csirs_remask 0xfff, expected pdsch_remask 0x777, received pdsch_remask 0xfff 
05:28:45.883252 WRN 51 0 [RU] section_id: 36, startPrbc: 225, numPrbc: 45, expected csirs_remask 0x888, received csirs_remask 0xfff, expected pdsch_remask 0x777, received pdsch_remask 0xfff 
05:28:45.883490 WRN 52 0 [RU] PDSCH Complete Cell 0 3GPP slot 7 F0 S3 S1 Payload Validation ERROR
05:28:45.883491 WRN 57 0 [RU] PDSCH Complete Cell 1 3GPP slot 7 F0 S3 S1 Payload Validation ERROR
05:28:45.883495 WRN 57 0 [RU] CSI-RS Complete Cell 1 3GPP slot 7 F0 S3 S1 Validation ERROR
05:28:45.883530 WRN 54 0 [RU] CSI-RS Complete Cell 0 3GPP slot 7 F0 S3 S1 Validation ERROR
05:28:45.883664 WRN 58 0 [RU] PDCCH_DL Complete Cell 1 3GPP slot 8 F0 S4 S0 validation error
05:28:45.883670 WRN 58 0 [RU] PDCCH_UL Complete Cell 1 3GPP slot 8 F0 S4 S0 validation error
05:28:45.883673 WRN 58 0 [RU] PDCCH_UL Complete Cell 1 3GPP slot 8 F0 S4 S0 validation error
05:28:45.883990 WRN 53 0 [RU] PDSCH Complete Cell 0 3GPP slot 8 F0 S4 S0 Payload Validation ERROR
05:28:45.883991 WRN 56 0 [RU] PDSCH Complete Cell 1 3GPP slot 8 F0 S4 S0 Payload Validation ERROR
05:28:45.884096 WRN 53 0 [RU] CSI-RS Complete Cell 0 3GPP slot 8 F0 S4 S0 Validation ERROR
05:28:45.884139 WRN 56 0 [RU] CSI-RS Complete Cell 1 3GPP slot 8 F0 S4 S0 Validation ERROR
05:28:45.884161 WRN 56 0 [RU] PDCCH_DL Complete Cell 1 3GPP slot 9 F0 S4 S1 validation error
05:28:45.884166 WRN 57 0 [RU] PDCCH_UL Complete Cell 1 3GPP slot 9 F0 S4 S1 validation error
05:28:45.884169 WRN 57 0 [RU] PDCCH_UL Complete Cell 1 3GPP slot 9 F0 S4 S1 validation error
05:28:45.884488 WRN 55 0 [RU] PDSCH Complete Cell 0 3GPP slot 9 F0 S4 S1 Payload Validation ERROR
05:28:45.884493 WRN 59 0 [RU] PDSCH Complete Cell 1 3GPP slot 9 F0 S4 S1 Payload Validation ERROR
05:28:45.884496 WRN 59 0 [RU] CSI-RS Complete Cell 1 3GPP slot 9 F0 S4 S1 Validation ERROR
05:28:45.884527 WRN 53 0 [RU] CSI-RS Complete Cell 0 3GPP slot 9 F0 S4 S1 Validation ERROR
05:28:45.884660 WRN 56 0 [RU] PDCCH_DL Complete Cell 1 3GPP slot 10 F0 S5 S0 validation error
05:28:45.884665 WRN 59 0 [RU] PDCCH_UL Complete Cell 1 3GPP slot 10 F0 S5 S0 validation error
05:28:45.884669 WRN 57 0 [RU] PDCCH_UL Complete Cell 1 3GPP slot 10 F0 S5 S0 validation error
05:28:45.884988 WRN 53 0 [RU] PDSCH Complete Cell 0 3GPP slot 10 F0 S5 S0 Payload Validation ERROR
05:28:45.884992 WRN 57 0 [RU] PDSCH Complete Cell 1 3GPP slot 10 F0 S5 S0 Payload Validation ERROR
05:28:45.885103 WRN 52 0 [RU] CSI-RS Complete Cell 0 3GPP slot 10 F0 S5 S0 Validation ERROR
05:28:45.885141 WRN 56 0 [RU] CSI-RS Complete Cell 1 3GPP slot 10 F0 S5 S0 Validation ERROR

Can you find any problem??

2

We need to first understand the errors on the cuphycontroller side. As can be seen, there are errors right from the start.

Can you please share your cuphycontroller and l2adapter config files? Can you describe what type of server you are using (information on server, GPU, NIC, etc.) and which steps did you follow to run the test?

Thank you.

4

Thanks for your reply! I attached 2 config file’s contents below.

  1. cuphycontroller config file
l2adapter_filename: l2_adapter_config_F08_CG1.yaml
aerial_metrics_backend_address: 127.0.0.1:8081

# CPU core shared by all low-priority threads
low_priority_core: 23
nic_tput_alert_threshold_mbps: 85000

cuphydriver_config:
  standalone: 0
  validation: 0
  num_slots: 8
  log_level: DBG
  profiler_sec: 0
  dpdk_thread: 23
  dpdk_verbose_logs: 0
  accu_tx_sched_res_ns: 500
  accu_tx_sched_disable: 0 #Flag applicable only for CX6-DX : BF3/CX7 HW and beyond support accurate send scheduling directly on timestamp, for CX6-DX this is implemented via software emulation
  fh_stats_dump_cpu_core: -1
  pdump_client_thread: -1
  use_green_contexts: 0 # Experimental feature; disabled by default
  mps_sm_pusch: 82
  #mps_sm_pusch: 88
  mps_sm_pucch: 20
  mps_sm_prach: 2
  mps_sm_ul_order: 20
  #mps_sm_ul_order: 24
  mps_sm_pdsch: 102
  mps_sm_pdcch: 10
  mps_sm_pbch: 2
  mps_sm_gpu_comms: 16
  mps_sm_srs: 16
  pdsch_fallback: 0
  dpdk_file_prefix: cuphycontroller
  nics:
    - nic: 0000:01:00.0
      mtu: 1514
      cpu_mbufs: 196608
      uplane_tx_handles: 64
      txq_count: 60
      rxq_count: 20
      txq_size: 8192
      rxq_size: 16384
      gpu: 0
  cus_port_failover: 0
  gpus:
    - 0
    # Set GPUID to the GPU sharing the PCIe switch as NIC
    # run nvidia-smi topo -m to find out which GPU
  workers_ul: [5,6]
  workers_dl: [11,12,13]
  debug_worker: -1
  workers_sched_priority: 95
  prometheus_thread: -1
  start_section_id_srs: 3072
  start_section_id_prach: 2048
  enable_ul_cuphy_graphs: 1
  enable_dl_cuphy_graphs: 1
  ul_order_timeout_cpu_ns: 8000000
  ul_order_timeout_log_interval_ns: 1000000000
  ul_order_timeout_gpu_ns: 3000000
  ul_order_timeout_gpu_log_enable: 0
  cplane_disable: 0
  gpu_init_comms_dl: 1
  cell_group: 1
  cell_group_num: 2
  fix_beta_dl: 1
  pusch_sinr: 2
  pusch_rssi: 1
  pusch_tdi: 1
  pusch_cfo: 1
  pusch_dftsofdm: 0
  pusch_to: 1
  pusch_select_eqcoeffalgo: 1
  pusch_select_chestalgo: 1
  pusch_tbsizecheck: 1
  pusch_subSlotProcEn: 1
  pusch_deviceGraphLaunchEn: 1
  pusch_waitTimeOutPreEarlyHarqUs: 5000
  pusch_waitTimeOutPostEarlyHarqUs: 5000
  puxch_polarDcdrListSz: 8
  enable_cpu_task_tracing: 0
  enable_prepare_tracing: 0
  disable_empw: 0 #1=>Disables Multi packet WQE feature
  cqe_tracer_config:
    enable_dl_cqe_tracing: 0
    cqe_trace_cell_mask: 1 #[64 bit mask: Bit0->Cell0, Bit1->Cell1...]
    cqe_trace_slot_mask: 196800 #[20 bit mask: Bit0->Slot0, Bit1->Slot1...] 196800=>All *6,*7 DL Slots
  ul_rx_pkt_tracing_level: 0
  enable_h2d_copy_thread: 1
  h2d_copy_thread_cpu_affinity : 41
  h2d_copy_thread_sched_priority : 95 #0->SCHED_OTHER, >0->Actual
  split_ul_cuda_streams: 0 # 1=Put UL slot 4 and slot 5 on different streams for DDDSUUDDDD pattern
  serialize_pucch_pusch: 0 # 1=Force serialization of PUSCH/PUCCH
                           # Note: for Early Harq (EH) order is PUSCH EH -> PUCCH -> PUSCH non EH
                           #       for non-Early Harq order is PUCCH -> all PUSCH processing
  aggr_obj_non_avail_th: 5 # Threshold for consecutive non-availability of Aggregated objects(UL/DL) or DL/UL buffers 
  dl_wait_th_ns:
    - 500000  #H2D copy wait threshold
    - 4000000 #cuPHY DL channel wait threshold
  sendCPlane_timing_error_th_ns : 0
  pusch_forcedNumCsi2Bits: 0
  mMIMO_enable: 0
  enable_srs: 0
  ue_mode: 0
  
  mCh_segment_proc_enable: 1
  enable_csip2_v3: 0
  pusch_aggr_per_ctx: 3
  prach_aggr_per_ctx: 2
  pucch_aggr_per_ctx: 4
  srs_aggr_per_ctx: 2
  ul_input_buffer_per_cell: 10
  ul_input_buffer_per_cell_srs: 4
  max_harq_pools: 384
  cells:
    - name: O-RU 0
      cell_id: 1
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6  #00:00:00:00:00:00
      dst_mac_addr: 9c:63:c0:d8:eb:9a  #20:04:9B:9E:27:A3
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [8, 0, 1, 2]
      eAxC_id_pdcch: [8, 0, 1, 2]
      eAxC_id_pdsch: [8, 0, 1, 2]
      eAxC_id_csirs: [8, 0, 1, 2]
      eAxC_id_pusch: [8, 0, 1, 2]
      eAxC_id_pucch: [8, 0, 1, 2]
      eAxC_id_srs: [8, 0, 1, 2]
      eAxC_id_prach: [15, 7, 0, 1]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 1
      cell_id: 2
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [1, 2, 4, 9]
      eAxC_id_pdcch: [1, 2, 4, 9]
      eAxC_id_pdsch: [1, 2, 4, 9]
      eAxC_id_csirs: [1, 2, 4, 9]
      eAxC_id_pusch: [1, 2, 4, 9]
      eAxC_id_pucch: [1, 2, 4, 9]
      eAxC_id_srs: [1, 2, 4, 9]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 2
      cell_id: 3
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [1, 2, 4, 9]
      eAxC_id_pdcch: [1, 2, 4, 9]
      eAxC_id_pdsch: [1, 2, 4, 9]
      eAxC_id_csirs: [1, 2, 4, 9]
      eAxC_id_pusch: [1, 2, 4, 9]
      eAxC_id_pucch: [1, 2, 4, 9]
      eAxC_id_srs: [1, 2, 4, 9]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 3
      cell_id: 4
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 4
      cell_id: 5
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 5
      cell_id: 6
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 6
      cell_id: 7
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 7
      cell_id: 8
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 8
      cell_id: 9
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 9
      cell_id: 10
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 10
      cell_id: 11
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 11
      cell_id: 12
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 12
      cell_id: 13
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 13
      cell_id: 14
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 14
      cell_id: 15
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 15
      cell_id: 16
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 16
      cell_id: 17
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 17
      cell_id: 18
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 18
      cell_id: 19
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
    - name: O-RU 19
      cell_id: 20
      ru_type: 3
      # set to 00:00:00:00:00:00 to use the MAC address of the NIC port to use
      src_mac_addr: 9c:63:c0:d8:ea:b6
      dst_mac_addr: 9c:63:c0:d8:eb:9a
      nic: 0000:01:00.0
      vlan: 2
      pcp: 7
      txq_count_uplane: 1
      eAxC_id_ssb_pbch: [0, 1, 2, 3]
      eAxC_id_pdcch: [0, 1, 2, 3]
      eAxC_id_pdsch: [0, 1, 2, 3]
      eAxC_id_csirs: [0, 1, 2, 3]
      eAxC_id_pusch: [0, 1, 2, 3]
      eAxC_id_pucch: [0, 1, 2, 3]
      eAxC_id_srs: [0, 1, 2, 3]
      eAxC_id_prach: [5, 6, 7, 10]
      dl_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      ul_iq_data_fmt: {comp_meth: 1, bit_width: 9}
      section_3_time_offset: 484
      fs_offset_dl: 0
      exponent_dl: 4
      ref_dl: 0
      fs_offset_ul: 0
      exponent_ul: 4
      max_amp_ul: 65504
      mu: 1
      T1a_max_up_ns: 345000
      T1a_max_cp_ul_ns: 336000
      Ta4_min_ns: 50000
      Ta4_max_ns: 331000
      Tcp_adv_dl_ns: 125000
      ul_u_plane_tx_offset_ns: 280000
      fh_len_range: 0
      pusch_prb_stride: 273
      prach_prb_stride: 12
      srs_prb_stride: 273
      pusch_ldpc_max_num_itr_algo_type: 1
      pusch_fixed_max_num_ldpc_itrs: 10
      pusch_ldpc_n_iterations: 7
      pusch_ldpc_early_termination: 0
      pusch_ldpc_algo_index: 0
      pusch_ldpc_flags: 2
      pusch_ldpc_use_half: 1
      pusch_nMaxPrb: 273
      pusch_nMaxRx: 4
      ul_gain_calibration: 48.68
      lower_guard_bw: 845
      tv_pusch: cuPhyChEstCoeffs.h5
  1. L2 adapter config file.
#gnb_module
msg_type: scf_5g_fapi
phy_class: scf_5g_fapi
slot_advance: 3

# tick_generator_mode: 0 - poll + sleep; 1 - sleep; 2 - timer_fd
tick_generator_mode: 1

# Allowed maximum latency of SLOT FAPI messages which send from L2 to L1. Unit: slot
allowed_fapi_latency: 1

# Allowed tick interval error. Unit: us
allowed_tick_error: 10

timer_thread_config:
  name: timer_thread
  cpu_affinity: 29
  sched_priority: 99
message_thread_config:
  name: msg_processing
  #core assignment
  cpu_affinity: 29
  # thread priority
  sched_priority: 95
# Lowest TTI for Ticking
mu_highest: 1
dl_tb_loc: 1
timer_thread_wakeup_threshold: 20000
l2a_allowed_latency: 100000
enableTickDynamicSfnSlot: 0
staticPucchSlotNum: 0
staticPuschSlotNum: 0
staticPdcchSlotNum: 0
staticPdschSlotNum: 0
staticCsiRsSlotNum: 0
staticSsbPcid: -1
staticSsbSFN: -1
# SHM IPC sync mode: 0 - sync per cell, 1 - sync per TTI
ipc_sync_mode: 0
cell_group: 1
enable_precoding: 1
enable_beam_forming: 1
prepone_h2d_copy: 1
pucch_dtx_thresholds: [-100.0, -100.0, 1.0, 1.0, -100.0]
pusch_dtx_thresholds: 1.0
# Duplicate the cell configs at the first message
duplicate_config_all_cells: 0

instances:
  # PHY 0
  -
    name: scf_gnb_configure_module_0_instance_0
  -
    name: scf_gnb_configure_module_0_instance_1
  -
    name: scf_gnb_configure_module_0_instance_2
  -
    name: scf_gnb_configure_module_0_instance_3
  -
    name: scf_gnb_configure_module_0_instance_4
  -
    name: scf_gnb_configure_module_0_instance_5
  -
    name: scf_gnb_configure_module_0_instance_6
  -
    name: scf_gnb_configure_module_0_instance_7
  -
    name: scf_gnb_configure_module_0_instance_8
  -
    name: scf_gnb_configure_module_0_instance_9
  -
    name: scf_gnb_configure_module_0_instance_10
  -
    name: scf_gnb_configure_module_0_instance_11
  -
    name: scf_gnb_configure_module_0_instance_12
  -
    name: scf_gnb_configure_module_0_instance_13
  -
    name: scf_gnb_configure_module_0_instance_14
  -
    name: scf_gnb_configure_module_0_instance_15
  -
    name: scf_gnb_configure_module_0_instance_16
  -
    name: scf_gnb_configure_module_0_instance_17
  -
    name: scf_gnb_configure_module_0_instance_18
  -
    name: scf_gnb_configure_module_0_instance_19

# Config dedicated yaml file for nvipc. Example: nvipc_multi_instances.yaml
nvipc_config_file: null

# Transport settings for nvIPC
transport:
  type: shm
  shm_config:
    primary: 1
    prefix: nvipc
    cuda_device_id: 0
    ring_len: 8192
    mempool_size:
      cpu_msg:
        buf_size: 8192
        pool_len: 4096
      cpu_data:
        buf_size: 576000
        pool_len: 1024
      cpu_large:
        buf_size: 4096000
        pool_len: 64
      cuda_data:
        buf_size: 307200
        pool_len: 0
      gpu_data:
        buf_size: 576000
        pool_len: 0
  app_config:
    grpc_forward: 0
    debug_timing: 0
    pcap_enable: 0
    pcap_cpu_core: 17 # CPU core of background pcap log save thread
    pcap_cache_size_bits: 29 # 2^29 = 512MB, size of /dev/shm/${prefix}_pcap
    pcap_file_size_bits: 31 # 2^31 = 2GB, max size of /var/log/aerial/${prefix}_pcap. Requires pcap_file_size_bits > pcap_cache_size_bits.
    pcap_max_data_size: 8000 # Max DL/UL FAPI data size to capture reduce pcap size.
  1. Steps I followed to run the test
  • 1.5.4.5.2.1 Running the F08 Test Cases
  1. Server setting
  • Server #1: 1 GH200
  • Server #2: 1 H100

Additionally, I ran single cell end-to-end test successfuly with cli below so I think connection between servers.

sudo -E /opt/nvidia/cuBB/build/cuPHY-CP/cuphycontroller/examples/cuphycontroller_scf F08_CG1
sudo /opt/nvidia/cuBB/build/cuPHY-CP/testMAC/testMAC/test_mac F08 1C 59
sudo /opt/nvidia/cuBB/build/cuPHY-CP/ru-emulator/ru_emulator/ru_emulator F08 1C 59
5

Thank you for the information.

Can you please provide the output of cuBB_system_checks scripts as explained in release documentation in section system validation script ?

I assume you are running the ru emulator on server #2. What kind of CPU do you have on this server? You do not need a GPU to run the ru_emulator.

Thank you.

6

Thanks for you fast reply!!!

  • output of cuBB_system_checks scripts( I ran inside cuBB container and I couldn’t install psutil because our server is not connected to internet)
-----General--------------------------------------
Hostname                           : ars-111gl-nhr
IP address                         : 60.30.220.2
Linux distro                       : "Ubuntu 22.04.4 LTS"
Linux kernel version               : 6.5.0-1019-nvidia
-----Kernel Command Line--------------------------
Audit subsystem                    : audit=0
Clock source                       : N/A
HugePage count                     : hugepages=48
HugePage size                      : hugepagesz=512M
CPU idle time management           : idle=poll
Max Intel C-state                  : N/A
Intel IOMMU                        : N/A
IOMMU                              : N/A
Isolated CPUs                      : N/A
Corrected errors                   : N/A
Adaptive-tick CPUs                 : nohz_full=4-64
Soft-lockup detector disable       : nosoftlockup
Max processor C-state              : processor.max_cstate=0
RCU callback polling               : rcu_nocb_poll
No-RCU-callback CPUs               : rcu_nocbs=4-64
TSC stability checks               : tsc=reliable
-----CPU------------------------------------------
CPU cores                          : 72
Thread(s) per CPU core             : 1
CPU MHz:                           : N/A
CPU sockets                        : 1
-----Environment variables------------------------
CUDA_DEVICE_MAX_CONNECTIONS        : 8
cuBB_SDK                           : /opt/nvidia/cuBB
-----Memory---------------------------------------
HugePage count                     : 48
Free HugePages                     : 46
HugePage size                      : 524288 kB
Shared memory size                 : 240G
-----Nvidia GPUs----------------------------------
GPU driver version                 : 555.42.02
CUDA version                       : 12.5
GPU0
  GPU product name                 : NVIDIA GH200 480GB
  GPU persistence mode             : Enabled
  Current GPU temperature          : 34 C
  GPU clock frequency              : 1980 MHz
  Max GPU clock frequency          : 1980 MHz
  GPU PCIe bus id                  : 00000009:01:00.0
-----GPUDirect topology---------------------------
	GPU0	NIC0	NIC1	NIC2	NIC3	CPU Affinity	NUMA Affinity	GPU NUMA ID
GPU0	 X 	SYS	SYS	SYS	SYS	0-71	0		1
NIC0	SYS	 X 	PIX	SYS	SYS				
NIC1	SYS	PIX	 X 	SYS	SYS				
NIC2	SYS	SYS	SYS	 X 	PIX				
NIC3	SYS	SYS	SYS	PIX	 X 				

Legend:

  X    = Self
  SYS  = Connection traversing PCIe as well as the SMP interconnect between NUMA nodes (e.g., QPI/UPI)
  NODE = Connection traversing PCIe as well as the interconnect between PCIe Host Bridges within a NUMA node
  PHB  = Connection traversing PCIe as well as a PCIe Host Bridge (typically the CPU)
  PXB  = Connection traversing multiple PCIe bridges (without traversing the PCIe Host Bridge)
  PIX  = Connection traversing at most a single PCIe bridge
  NV#  = Connection traversing a bonded set of # NVLinks

NIC Legend:

  NIC0: mlx5_0
  NIC1: mlx5_1
  NIC2: mlx5_2
  NIC3: mlx5_3


-----Mellanox NICs--------------------------------
-----Mellanox NIC Interfaces----------------------
-----Linux PTP------------------------------------


-----Software Packages----------------------------
cmake       /usr/local/bin         : 3.25.1
docker                             : N/A
gcc         /usr/bin               : 11.4.0
git-lfs     /usr/bin               : 3.0.2
MOFED                              : N/A
meson       /usr/bin               : 0.61.2
ninja       /usr/bin               : 1.10.2
ptp4l                              : N/A
-----Loaded Kernel Modules------------------------
GDRCopy                            : gdrdrv
GPUDirect RDMA                     : N/A
Nvidia                             : nvidia
-----Non-persistent settings----------------------
VM swappiness                      : vm.swappiness = 0
VM zone reclaim mode               : vm.zone_reclaim_mode = 0
-----Docker images--------------------------------
  • sever #2 CPU: 6548N 2P 32C 2.8G25W0 (2/6.225/2.3/2050/56MS)128 LDS.2QA.2DL7yr
7

Are you using OAM commands to update mac address?

05:28:37.859923 WRN 7676 0 [DRV.API] Cell active, cannot update config!
05:28:37.860612 ERR 7676 0 [AERIAL_CUPHYDRV_API_EVENT] [L2A.MODULE] Failed to update cell 2 dst_mac=9c:63:c0:d8:eb:9a vlan_tci=0xE002
05:28:37.860617 ERR 7676 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] l1_cell_update_cell_config: Could't getCellByMplaneId 
05:28:37.860618 ERR 7676 0 [AERIAL_CUPHYDRV_API_EVENT] [L2A.MODULE] Failed to update cell 3 dst_mac=9c:63:c0:d8:eb:9a vlan_tci=0xE002
8

What is OAM commands? I only used cli below.

sudo -E /opt/nvidia/cuBB/build/cuPHY-CP/cuphycontroller/examples/cuphycontroller_scf F08 CG1
sudo -E  /opt/nvidia/cuBB/build/cuPHY-CP/ru-emulator/ru_emulator/ru_emulator F08 2C 59
sudo -E  /opt/nvidia/cuBB/build/cuPHY-CP/testMAC/testMAC/test_mac F08 2C 59
9

I attached the error from cuphycontroller terminal.

Started cuphycontroller on CPU core 70

AERIAL_LOG_PATH unset

Using default log path

Log file set to /tmp/phy.log

Aerial metrics backend address: 127.0.0.1:8081

06:34:09.243523 WRN phy_init 0 [CTL.SCF] Config file: /opt/nvidia/cuBB/cuPHY-CP/cuphycontroller/config/cuphycontroller_F08_CG1_1031.yaml

06:34:09.244197 WRN phy_init 0 [CTL.SCF] low_priority_core=23

06:34:09.244393 WRN phy_init 0 [NVLOG.CPP] Using /opt/nvidia/cuBB/cuPHY/nvlog/config/nvlog_config.yaml for nvlog configuration

YAML invalid key: enable_l1_param_sanity_check Using default value of 0 to YAML_PARAM_ENABLE_L1_PARAM_SANITY_CHECK

YAML invalid key: ul_order_max_rx_pkts Using default value of 0 to UL_ORDER_MAX_RX_PKTS

YAML invalid key: pusch_nMaxLdpcHetConfigs Using default value of 32 to PUSCH-N-MAX-LDPC-HET-CONFIGS

06:34:09.255954 ERR phy_init 0 [AERIAL_CONFIG_EVENT] [CTL.YAML] cuphycontroller config. yaml does not have cpu_init_comms key; defaulting to 0.

06:34:09.256093 WRN phy_init 0 [CTL.YAML] cell_id 1 nic_index :0

06:34:09.256157 WRN phy_init 0 [CTL.YAML] cell_id 2 nic_index :0

06:34:09.256212 WRN phy_init 0 [CTL.YAML] Num Slots: 8

06:34:09.256213 WRN phy_init 0 [CTL.YAML] Enable UL cuPHY Graphs: 1

06:34:09.256213 WRN phy_init 0 [CTL.YAML] Enable DL cuPHY Graphs: 1

06:34:09.256213 WRN phy_init 0 [CTL.YAML] Accurate TX scheduling clock resolution (ns): 500

06:34:09.256213 WRN phy_init 0 [CTL.YAML] DPDK core: 23

06:34:09.256214 WRN phy_init 0 [CTL.YAML] Prometheus core: -1

06:34:09.256214 WRN phy_init 0 [CTL.YAML] UL cores:

06:34:09.256214 WRN phy_init 0 [CTL.YAML] - 5

06:34:09.256214 WRN phy_init 0 [CTL.YAML] - 6

06:34:09.256214 WRN phy_init 0 [CTL.YAML] DL cores:

06:34:09.256215 WRN phy_init 0 [CTL.YAML] - 11

06:34:09.256215 WRN phy_init 0 [CTL.YAML] - 12

06:34:09.256215 WRN phy_init 0 [CTL.YAML] - 13

06:34:09.256215 WRN phy_init 0 [CTL.YAML] Debug worker: -1

06:34:09.256215 WRN phy_init 0 [CTL.YAML] Data Lake core: -1

06:34:09.256215 WRN phy_init 0 [CTL.YAML] SRS starting Section ID: 3072

06:34:09.256215 WRN phy_init 0 [CTL.YAML] PRACH starting Section ID: 2048

06:34:09.256215 WRN phy_init 0 [CTL.YAML] USE GREEN CONTEXTS: 0

06:34:09.256216 WRN phy_init 0 [CTL.YAML] MPS SM PUSCH: 82

06:34:09.256216 WRN phy_init 0 [CTL.YAML] MPS SM PUCCH: 20

06:34:09.256216 WRN phy_init 0 [CTL.YAML] MPS SM PRACH: 2

06:34:09.256216 WRN phy_init 0 [CTL.YAML] MPS SM UL ORDER: 20

06:34:09.256216 WRN phy_init 0 [CTL.YAML] MPS SM PDSCH: 102

06:34:09.256216 WRN phy_init 0 [CTL.YAML] MPS SM PDCCH: 10

06:34:09.256217 WRN phy_init 0 [CTL.YAML] MPS SM PBCH: 2

06:34:09.256217 WRN phy_init 0 [CTL.YAML] MPS SM GPU_COMMS: 16

06:34:09.256217 WRN phy_init 0 [CTL.YAML] PDSCH fallback: 0

06:34:09.256217 WRN phy_init 0 [CTL.YAML] Massive MIMO enable: 0

06:34:09.256217 WRN phy_init 0 [CTL.YAML] Enable SRS : 0

06:34:09.256217 WRN phy_init 0 [CTL.YAML] ul_order_timeout_gpu_log_enable: 0

06:34:09.256217 WRN phy_init 0 [CTL.YAML] ue_mode: 0

06:34:09.256217 WRN phy_init 0 [CTL.YAML] Aggr Obj Non-availability threshold: 5

06:34:09.256217 WRN phy_init 0 [CTL.YAML] sendCPlane_timing_error_th_ns: 0

06:34:09.256217 WRN phy_init 0 [CTL.YAML] pusch_aggr_per_ctx: 3

06:34:09.256218 WRN phy_init 0 [CTL.YAML] prach_aggr_per_ctx: 2

06:34:09.256218 WRN phy_init 0 [CTL.YAML] pucch_aggr_per_ctx: 4

06:34:09.256218 WRN phy_init 0 [CTL.YAML] srs_aggr_per_ctx: 2

06:34:09.256218 WRN phy_init 0 [CTL.YAML] max_harq_pools: 384

06:34:09.256219 WRN phy_init 0 [CTL.YAML] ul_input_buffer_per_cell: 10

06:34:09.256219 WRN phy_init 0 [CTL.YAML] ul_input_buffer_per_cell_srs: 4

06:34:09.256219 WRN phy_init 0 [CTL.YAML] ul_order_timeout_gpu_log_enable: 0

06:34:09.256219 WRN phy_init 0 [CTL.YAML] GPU-initiated comms DL: 1

06:34:09.256219 WRN phy_init 0 [CTL.YAML] CPU-initiated comms : 0

06:34:09.256219 WRN phy_init 0 [CTL.YAML] Cell group: 1

06:34:09.256219 WRN phy_init 0 [CTL.YAML] Cell group num: 2

06:34:09.256219 WRN phy_init 0 [CTL.YAML] puxchPolarDcdrListSz: 8

06:34:09.256219 WRN phy_init 0 [CTL.YAML] split_ul_cuda_streams: 0

06:34:09.256219 WRN phy_init 0 [CTL.YAML] serialize_pucch_pusch: 0

06:34:09.256219 WRN phy_init 0 [CTL.YAML] Number of Cell Configs: 2

06:34:09.256219 WRN phy_init 0 [CTL.YAML] L2Adapter config file: /opt/nvidia/cuBB/cuPHY-CP/cuphycontroller/config/l2_adapter_config_F08_CG1.yaml

06:34:09.256219 WRN phy_init 0 [CTL.YAML] Cell name: O-RU 0

06:34:09.256220 WRN phy_init 0 [CTL.YAML] MU: 1

06:34:09.256220 WRN phy_init 0 [CTL.YAML] ID: 1

06:34:09.256220 WRN phy_init 0 [CTL.YAML] Cell name: O-RU 1

06:34:09.256220 WRN phy_init 0 [CTL.YAML] MU: 1

06:34:09.256220 WRN phy_init 0 [CTL.YAML] ID: 2

06:34:09.256220 WRN phy_init 0 [CTL.YAML] Number of MPlane Configs: 2

06:34:09.256220 WRN phy_init 0 [CTL.YAML] Mplane ID: 1

06:34:09.256221 WRN phy_init 0 [CTL.YAML] VLAN ID: 2

06:34:09.256221 WRN phy_init 0 [CTL.YAML] Source Eth Address: 9c:63:c0:d8:ea:b6

06:34:09.256221 WRN phy_init 0 [CTL.YAML] Destination Eth Address: 9c:63:c0:d8:eb:9a

06:34:09.256221 WRN phy_init 0 [CTL.YAML] NIC port: 0000:01:00.0

06:34:09.256221 WRN phy_init 0 [CTL.YAML] RU Type: 3

06:34:09.256221 WRN phy_init 0 [CTL.YAML] U-plane TXQs: 1

06:34:09.256221 WRN phy_init 0 [CTL.YAML] DL compression method: 1

06:34:09.256221 WRN phy_init 0 [CTL.YAML] DL iq bit width: 9

06:34:09.256221 WRN phy_init 0 [CTL.YAML] UL compression method: 1

06:34:09.256222 WRN phy_init 0 [CTL.YAML] UL iq bit width: 9

06:34:09.256222 WRN phy_init 0 [CTL.YAML]

06:34:09.256222 WRN phy_init 0 [CTL.YAML] Flow list SSB/PBCH:

06:34:09.256222 WRN phy_init 0 [CTL.YAML] 8

06:34:09.256222 WRN phy_init 0 [CTL.YAML] 0

06:34:09.256222 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256222 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256223 WRN phy_init 0 [CTL.YAML] Flow list PDCCH:

06:34:09.256223 WRN phy_init 0 [CTL.YAML] 8

06:34:09.256223 WRN phy_init 0 [CTL.YAML] 0

06:34:09.256223 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256223 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256223 WRN phy_init 0 [CTL.YAML] Flow list PDSCH:

06:34:09.256223 WRN phy_init 0 [CTL.YAML] 8

06:34:09.256223 WRN phy_init 0 [CTL.YAML] 0

06:34:09.256223 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256223 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256223 WRN phy_init 0 [CTL.YAML] Flow list CSIRS:

06:34:09.256223 WRN phy_init 0 [CTL.YAML] 8

06:34:09.256223 WRN phy_init 0 [CTL.YAML] 0

06:34:09.256224 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256224 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256224 WRN phy_init 0 [CTL.YAML] Flow list PUSCH:

06:34:09.256224 WRN phy_init 0 [CTL.YAML] 8

06:34:09.256224 WRN phy_init 0 [CTL.YAML] 0

06:34:09.256224 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256224 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256224 WRN phy_init 0 [CTL.YAML] Flow list PUCCH:

06:34:09.256224 WRN phy_init 0 [CTL.YAML] 8

06:34:09.256224 WRN phy_init 0 [CTL.YAML] 0

06:34:09.256224 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256224 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256224 WRN phy_init 0 [CTL.YAML] Flow list SRS:

06:34:09.256225 WRN phy_init 0 [CTL.YAML] 8

06:34:09.256225 WRN phy_init 0 [CTL.YAML] 0

06:34:09.256225 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256225 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256225 WRN phy_init 0 [CTL.YAML] Flow list PRACH:

06:34:09.256225 WRN phy_init 0 [CTL.YAML] 15

06:34:09.256225 WRN phy_init 0 [CTL.YAML] 7

06:34:09.256225 WRN phy_init 0 [CTL.YAML] 0

06:34:09.256225 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256225 WRN phy_init 0 [CTL.YAML] PUSCH TV: /opt/nvidia/cuBB/testVectors/cuPhyChEstCoeffs.h5

06:34:09.256225 WRN phy_init 0 [CTL.YAML] SRS TV: /opt/nvidia/cuBB/testVectors/cuPhyChEstCoeffs.h5

06:34:09.256225 WRN phy_init 0 [CTL.YAML] Section_3 time offset: 58369

06:34:09.256226 WRN phy_init 0 [CTL.YAML] nMaxRxAnt: 4

06:34:09.256226 WRN phy_init 0 [CTL.YAML] PUSCH PRBs Stride: 273

06:34:09.256226 WRN phy_init 0 [CTL.YAML] PRACH PRBs Stride: 12

06:34:09.256226 WRN phy_init 0 [CTL.YAML] SRS PRBs Stride: 273

06:34:09.256226 WRN phy_init 0 [CTL.YAML] PUSCH nMaxPrb: 273

06:34:09.256226 WRN phy_init 0 [CTL.YAML] PUSCH nMaxRx: 4

06:34:09.256226 WRN phy_init 0 [CTL.YAML] UL Gain Calibration: 48.68

06:34:09.256226 WRN phy_init 0 [CTL.YAML] Lower guard bw: 845

06:34:09.256227 WRN phy_init 0 [CTL.YAML] Mplane ID: 2

06:34:09.256227 WRN phy_init 0 [CTL.YAML] VLAN ID: 2

06:34:09.256227 WRN phy_init 0 [CTL.YAML] Source Eth Address: 9c:63:c0:d8:ea:b6

06:34:09.256227 WRN phy_init 0 [CTL.YAML] Destination Eth Address: 9c:63:c0:d8:eb:9a

06:34:09.256227 WRN phy_init 0 [CTL.YAML] NIC port: 0000:01:00.0

06:34:09.256227 WRN phy_init 0 [CTL.YAML] RU Type: 3

06:34:09.256227 WRN phy_init 0 [CTL.YAML] U-plane TXQs: 1

06:34:09.256227 WRN phy_init 0 [CTL.YAML] DL compression method: 1

06:34:09.256227 WRN phy_init 0 [CTL.YAML] DL iq bit width: 9

06:34:09.256227 WRN phy_init 0 [CTL.YAML] UL compression method: 1

06:34:09.256227 WRN phy_init 0 [CTL.YAML] UL iq bit width: 9

06:34:09.256227 WRN phy_init 0 [CTL.YAML]

06:34:09.256227 WRN phy_init 0 [CTL.YAML] Flow list SSB/PBCH:

06:34:09.256227 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256227 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256227 WRN phy_init 0 [CTL.YAML] 4

06:34:09.256227 WRN phy_init 0 [CTL.YAML] 9

06:34:09.256227 WRN phy_init 0 [CTL.YAML] Flow list PDCCH:

06:34:09.256227 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256227 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256227 WRN phy_init 0 [CTL.YAML] 4

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 9

06:34:09.256228 WRN phy_init 0 [CTL.YAML] Flow list PDSCH:

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 4

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 9

06:34:09.256228 WRN phy_init 0 [CTL.YAML] Flow list CSIRS:

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 4

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 9

06:34:09.256228 WRN phy_init 0 [CTL.YAML] Flow list PUSCH:

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 4

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 9

06:34:09.256228 WRN phy_init 0 [CTL.YAML] Flow list PUCCH:

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 4

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 9

06:34:09.256228 WRN phy_init 0 [CTL.YAML] Flow list SRS:

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 1

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 2

06:34:09.256228 WRN phy_init 0 [CTL.YAML] 4

06:34:09.256229 WRN phy_init 0 [CTL.YAML] 9

06:34:09.256229 WRN phy_init 0 [CTL.YAML] Flow list PRACH:

06:34:09.256229 WRN phy_init 0 [CTL.YAML] 5

06:34:09.256229 WRN phy_init 0 [CTL.YAML] 6

06:34:09.256229 WRN phy_init 0 [CTL.YAML] 7

06:34:09.256229 WRN phy_init 0 [CTL.YAML] 10

06:34:09.256229 WRN phy_init 0 [CTL.YAML] PUSCH TV: /opt/nvidia/cuBB/testVectors/cuPhyChEstCoeffs.h5

06:34:09.256229 WRN phy_init 0 [CTL.YAML] SRS TV: /opt/nvidia/cuBB/testVectors/cuPhyChEstCoeffs.h5

06:34:09.256229 WRN phy_init 0 [CTL.YAML] Section_3 time offset: 58369

06:34:09.256229 WRN phy_init 0 [CTL.YAML] nMaxRxAnt: 4

06:34:09.256229 WRN phy_init 0 [CTL.YAML] PUSCH PRBs Stride: 273

06:34:09.256229 WRN phy_init 0 [CTL.YAML] PRACH PRBs Stride: 12

06:34:09.256229 WRN phy_init 0 [CTL.YAML] SRS PRBs Stride: 273

06:34:09.256229 WRN phy_init 0 [CTL.YAML] PUSCH nMaxPrb: 273

06:34:09.256229 WRN phy_init 0 [CTL.YAML] PUSCH nMaxRx: 4

06:34:09.256229 WRN phy_init 0 [CTL.YAML] UL Gain Calibration: 48.68

06:34:09.256229 WRN phy_init 0 [CTL.YAML] Lower guard bw: 845

06:34:09.452510 WRN phy_init 0 [DRV.CTX] CUDA_DEVICE_MAX_CONNECTIONS 8

06:34:09.452516 WRN phy_init 0 [DRV.CTX] use_green_contexts 0

EAL: Detected CPU lcores: 72

EAL: Detected NUMA nodes: 1

EAL: Detected shared linkage of DPDK

EAL: Multi-process socket /var/run/dpdk/cuphycontroller/mp_socket

EAL: Selected IOVA mode 'VA'

EAL: VFIO support initialized

EAL: Probe PCI driver: gpu_cuda (10de:2342) device: 0009:01:00.0 (socket 0)

EAL: Probe PCI driver: mlx5_pci (15b3:a2dc) device: 0000:01:00.0 (socket 0)

gRPC Server listening on 0.0.0.0:50051

06:34:12.816123 WRN phy_main 0 [NVIPC.RING] nv_ipc_ring_open: name=R_cell_cfg ring_len=16 buf_size=8 OK

06:34:12.816130 WRN phy_main 0 [NVIPC.RING] nv_ipc_ring_open: name=R_generic_async_test ring_len=16 buf_size=8 OK

06:34:12.816131 WRN phy_main 0 [NVIPC.RING] nv_ipc_ring_open: name=R_cpu_stall ring_len=16 buf_size=8 OK

06:34:12.816132 WRN phy_main 0 [NVIPC.RING] nv_ipc_ring_open: name=R_fapi_delay_test ring_len=16 buf_size=8 OK

06:34:12.816134 WRN phy_main 0 [NVIPC.RING] nv_ipc_ring_open: name=R_ul_u_plane_drop_requests ring_len=32 buf_size=8 OK

06:34:12.816135 WRN phy_main 0 [NVIPC.RING] nv_ipc_ring_open: name=R_sfn_slot_sync_requests ring_len=16 buf_size=8 OK

06:34:12.827478 WRN phy_main 0 [CTL.SCF]

====> PhyDriver initialized!

06:34:12.834013 WRN phy_main 0 [NVIPC.SHM] nvipc server initialized

06:34:12.834090 WRN phy_main 0 [NVIPC.SHM] shm_ipc_open: forward_enable=0 fw_max_msg_buf_count=0 fw_max_data_buf_count=0

06:34:12.834091 WRN phy_main 0 [NVIPC.SHM] create_shm_nv_ipc_interface: OK

06:34:12.834093 WRN phy_main 0 [L2A.TRANSPORT] phy_mac_transport[0] created. phy_cell_map=0 mac_cell_map=0 mapped=false

06:34:12.834093 WRN phy_main 0 [L2A.TRANSPORT] init: loaded 1 nvipc instance

06:34:12.847287 WRN 131 0 [NVIPC.EFD] [nvipc][core 23 ] share event_fd thread info: sched_policy=0 sched_priority=0

06:34:12.847353 WRN 131 0 [NVIPC.EFD] [nvipc] Listening for nvipc client to connect ...

06:34:12.852320 WRN phy_main 0 [CTL.SCF] cuPHYController configured for 2 cells

06:34:12.852322 WRN phy_main 0 [CTL.SCF]

====> cuPHYController initialized, L1 is ready!

06:34:12.852334 WRN phy_main 0 [CTL.STARTUP_TIMES] {TI PERCENTAGE} <cuphycontroller main> Start Main:0.0,Parse Cuphycontroller YAML:0.0,Init nvlog:0.3,Cuda Set Device:4.5,Cuphy PTI Init:0.7,Init PHYDriver:93.7,Init cuphydriver:0.0,Make PHYDriverProxy:0.0,Init SCF FAPI:0.0,Create PHY_group:0.7,Start PHY_group:0.0, (total: 3609569.2us),

06:34:12.852338 WRN phy_main 0 [CTL.STARTUP_TIMES] {TI DURATION} <cuphycontroller main> Start Main:724.663,Parse Cuphycontroller YAML:730.712,Init nvlog:12020.856,Cuda Set Device:162669.457,Cuphy PTI Init:26322.327,Init PHYDriver:3382261.248,Init cuphydriver:0.672,Make PHYDriverProxy:10.655,Init SCF FAPI:2.048,Create PHY_group:24621.514,Start PHY_group:205.054,

06:34:12.852340 WRN phy_main 0 [CTL.STARTUP_TIMES] {TI TIMESTAMPS} <cuphycontroller main> Start Main:1730356449242753518,Parse Cuphycontroller YAML:1730356449243478181,Init nvlog:1730356449244208893,Cuda Set Device:1730356449256229749,Cuphy PTI Init:1730356449418899206,Init PHYDriver:1730356449445221533,Init cuphydriver:1730356452827482781,Make PHYDriverProxy:1730356452827483453,Init SCF FAPI:1730356452827494108,Create PHY_group:1730356452827496156,Start PHY_group:1730356452852117670,End Main:1730356452852322724,

06:34:12.852996 WRN msg_processing 0 [L2A.MODULE] Thread thread_func on CPU 29 initialized fmtlog

06:34:13.816679 WRN UlPhyDriver06 0 [DRV.WORKER] Thread UlPhyDriver06(worker_default) on CPU 6 initialized fmtlog

06:34:13.816857 WRN UlPhyDriver05 0 [DRV.WORKER] Thread UlPhyDriver05(worker_default) on CPU 5 initialized fmtlog

06:34:13.816870 WRN DlPhyDriver13 0 [DRV.WORKER] Thread DlPhyDriver13(worker_default) on CPU 13 initialized fmtlog

06:34:13.816955 WRN DlPhyDriver12 0 [DRV.WORKER] Thread DlPhyDriver12(worker_default) on CPU 12 initialized fmtlog

06:34:13.816968 WRN DlPhyDriver11 0 [DRV.WORKER] Thread DlPhyDriver11(worker_default) on CPU 11 initialized fmtlog

06:38:07.105943 WRN 131 0 [NVIPC.EFD] [nvipc] nvipc unix socket server connected

06:38:07.105982 WRN 131 0 [NVIPC.EFD] [nvipc] Received peer event_fd: 497

06:38:07.306065 WRN 131 0 [NVIPC.EFD] Share event_fd succeed: efd_tx=497, efd_rx=504

06:38:07.306068 WRN 131 0 [NVIPC.EFD] [nvipc][core 23 ] nvipc unix socket exit

06:38:08.163183 WRN msg_processing 0 [SCF.PHY] CONFIG_TLV_INDICATION_INSTANCES_PER_SLOT indPerSlotPtr[0] = 0

06:38:08.163184 WRN msg_processing 0 [SCF.PHY] CONFIG_TLV_INDICATION_INSTANCES_PER_SLOT indPerSlotPtr[1] = 0

06:38:08.163184 WRN msg_processing 0 [SCF.PHY] CONFIG_TLV_INDICATION_INSTANCES_PER_SLOT indPerSlotPtr[2] = 2

06:38:08.163184 WRN msg_processing 0 [SCF.PHY] CONFIG_TLV_INDICATION_INSTANCES_PER_SLOT indPerSlotPtr[3] = 0

06:38:08.163184 WRN msg_processing 0 [SCF.PHY] CONFIG_TLV_INDICATION_INSTANCES_PER_SLOT indPerSlotPtr[4] = 0

06:38:08.163184 WRN msg_processing 0 [SCF.PHY] CONFIG_TLV_INDICATION_INSTANCES_PER_SLOT indPerSlotPtr[5] = 0

06:38:08.163184 WRN msg_processing 0 [SCF.PHY] txPortTlvPresent absent. Setting nTxAnt to 4

06:38:08.163184 WRN msg_processing 0 [SCF.PHY] txPortTlvPresent absent. Setting nRxAnt to 4

06:38:08.163194 WRN msg_processing 0 [SCF.PHY] PHY Cell Id = 41, M-Plane Id= 1

06:38:08.169840 WRN msg_processing 0 [DRV.PUSCH] tvStatPrms: PUSCH enableDeviceGraphLaunch=1 enableCsiP2Fapiv3 = 0 nMaxLdpcHetConfigs = 32

06:38:08.169842 WRN msg_processing 0 [DRV.PUSCH] Early-HARQ is enabled. Timeout values for wait kernels are 5000us and 5000us

06:38:08.169845 WRN msg_processing 0 [DRV.PUSCH] static_params.nMaxPrb: 273

06:38:08.169846 WRN msg_processing 0 [DRV.PUSCH] static_params.nMaxRx: 4

06:38:08.173340 WRN msg_processing 0 [DRV.PUSCH] tvStatPrms: PUSCH enableDeviceGraphLaunch=1 enableCsiP2Fapiv3 = 0 nMaxLdpcHetConfigs = 32

06:38:08.173341 WRN msg_processing 0 [DRV.PUSCH] Early-HARQ is enabled. Timeout values for wait kernels are 5000us and 5000us

06:38:08.173341 WRN msg_processing 0 [DRV.PUSCH] static_params.nMaxPrb: 273

06:38:08.173341 WRN msg_processing 0 [DRV.PUSCH] static_params.nMaxRx: 4

06:38:08.176815 WRN msg_processing 0 [DRV.PUSCH] tvStatPrms: PUSCH enableDeviceGraphLaunch=1 enableCsiP2Fapiv3 = 0 nMaxLdpcHetConfigs = 32

06:38:08.176816 WRN msg_processing 0 [DRV.PUSCH] Early-HARQ is enabled. Timeout values for wait kernels are 5000us and 5000us

06:38:08.176816 WRN msg_processing 0 [DRV.PUSCH] static_params.nMaxPrb: 273

06:38:08.176816 WRN msg_processing 0 [DRV.PUSCH] static_params.nMaxRx: 4

06:38:08.176858 WRN msg_processing 0 [DRV.API] Update cell: mplane_id=1 dl_grid_sz=273

06:38:08.176859 WRN msg_processing 0 [DRV.API] Update cell: mplane_id=1 ul_grid_sz=273

06:38:08.177034 WRN msg_processing 0 [SCF.PHY] CONFIG_TLV_INDICATION_INSTANCES_PER_SLOT indPerSlotPtr[0] = 0

06:38:08.177035 WRN msg_processing 0 [SCF.PHY] CONFIG_TLV_INDICATION_INSTANCES_PER_SLOT indPerSlotPtr[1] = 0

06:38:08.177035 WRN msg_processing 0 [SCF.PHY] CONFIG_TLV_INDICATION_INSTANCES_PER_SLOT indPerSlotPtr[2] = 2

06:38:08.177035 WRN msg_processing 0 [SCF.PHY] CONFIG_TLV_INDICATION_INSTANCES_PER_SLOT indPerSlotPtr[3] = 0

06:38:08.177035 WRN msg_processing 0 [SCF.PHY] CONFIG_TLV_INDICATION_INSTANCES_PER_SLOT indPerSlotPtr[4] = 0

06:38:08.177035 WRN msg_processing 0 [SCF.PHY] CONFIG_TLV_INDICATION_INSTANCES_PER_SLOT indPerSlotPtr[5] = 0

06:38:08.177035 WRN msg_processing 0 [SCF.PHY] txPortTlvPresent absent. Setting nTxAnt to 4

06:38:08.177035 WRN msg_processing 0 [SCF.PHY] txPortTlvPresent absent. Setting nRxAnt to 4

06:38:08.177038 WRN msg_processing 0 [SCF.PHY] PHY Cell Id = 42, M-Plane Id= 2

06:38:08.177238 WRN msg_processing 0 [DRV.PUSCH] static_params.nMaxPrb: 273

06:38:08.177239 WRN msg_processing 0 [DRV.PUSCH] static_params.nMaxRx: 4

06:38:08.186290 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 485.868 MiB for cuPHY PUSCH channel object (0x2de094e0000).

06:38:08.186291 WRN msg_processing 0 [CUPHY.PUSCH_RX] PuschRx: Running with eqCoeffAlgo 1

06:38:08.186336 WRN msg_processing 0 [DRV.PUSCH] static_params.nMaxPrb: 273

06:38:08.186336 WRN msg_processing 0 [DRV.PUSCH] static_params.nMaxRx: 4

06:38:08.194452 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 485.868 MiB for cuPHY PUSCH channel object (0x2de09550000).

06:38:08.194453 WRN msg_processing 0 [CUPHY.PUSCH_RX] PuschRx: Running with eqCoeffAlgo 1

06:38:08.194495 WRN msg_processing 0 [DRV.PUSCH] static_params.nMaxPrb: 273

06:38:08.194495 WRN msg_processing 0 [DRV.PUSCH] static_params.nMaxRx: 4

06:38:08.202558 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 485.868 MiB for cuPHY PUSCH channel object (0x2de09f90000).

06:38:08.202559 WRN msg_processing 0 [CUPHY.PUSCH_RX] PuschRx: Running with eqCoeffAlgo 1

06:38:08.206878 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 6.003 MiB for cuPHY PUCCH channel object (0x2de093ad200).

06:38:08.209433 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 6.003 MiB for cuPHY PUCCH channel object (0x2de093ae000).

06:38:08.211789 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 6.003 MiB for cuPHY PUCCH channel object (0x2de093aee00).

06:38:08.214151 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 6.003 MiB for cuPHY PUCCH channel object (0x2de0ab60000).

06:38:08.216614 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.364 MiB for cuPHY PRACH channel object (0x2de0a67e400).

06:38:08.217895 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.364 MiB for cuPHY PRACH channel object (0x2de0a67e5c0).

06:38:08.223696 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 137.406 MiB for cuPHY PDSCH channel object (0x2de095e8400).

06:38:08.228996 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 137.406 MiB for cuPHY PDSCH channel object (0x2de095e9c00).

06:38:08.233860 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 137.406 MiB for cuPHY PDSCH channel object (0x2de095eb400).

06:38:08.238995 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 137.406 MiB for cuPHY PDSCH channel object (0x2de095ecc00).

06:38:08.244643 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 137.406 MiB for cuPHY PDSCH channel object (0x2de095ee400).

06:38:08.249575 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 137.406 MiB for cuPHY PDSCH channel object (0x2de00140000).

06:38:08.255121 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 137.406 MiB for cuPHY PDSCH channel object (0x2de00141800).

06:38:08.260192 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 137.406 MiB for cuPHY PDSCH channel object (0x2de00143000).

06:38:08.265462 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 137.406 MiB for cuPHY PDSCH channel object (0x2de00144800).

06:38:08.271014 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 137.406 MiB for cuPHY PDSCH channel object (0x2de00146000).

06:38:08.272215 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.002 MiB for cuPHY SSB channel object (0x2de01396980).

06:38:08.272419 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.002 MiB for cuPHY SSB channel object (0x2de01396c80).

06:38:08.272550 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.002 MiB for cuPHY SSB channel object (0x2de01396f80).

06:38:08.272691 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.002 MiB for cuPHY SSB channel object (0x2de01397280).

06:38:08.272815 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.002 MiB for cuPHY SSB channel object (0x2de01397580).

06:38:08.272936 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.002 MiB for cuPHY SSB channel object (0x2de01397880).

06:38:08.273078 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.002 MiB for cuPHY SSB channel object (0x2de01397b80).

06:38:08.273199 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.002 MiB for cuPHY SSB channel object (0x2de01397e80).

06:38:08.273311 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.002 MiB for cuPHY SSB channel object (0x2de01398180).

06:38:08.273438 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.002 MiB for cuPHY SSB channel object (0x2de01398480).

06:38:08.273721 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.125 MiB for cuPHY PDCCH channel object (0x2de0a566900).

06:38:08.273973 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.125 MiB for cuPHY PDCCH channel object (0x2de0a564100).

06:38:08.274087 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.125 MiB for cuPHY PDCCH channel object (0x2de0a565a00).

06:38:08.274309 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.125 MiB for cuPHY PDCCH channel object (0x2de0a567800).

06:38:08.274458 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.125 MiB for cuPHY PDCCH channel object (0x2de0a567d00).

06:38:08.274698 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.125 MiB for cuPHY PDCCH channel object (0x2de0a568200).

06:38:08.275198 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.125 MiB for cuPHY PDCCH channel object (0x2de0a568700).

06:38:08.275333 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.125 MiB for cuPHY PDCCH channel object (0x2de0a568c00).

06:38:08.275535 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.125 MiB for cuPHY PDCCH channel object (0x2de0a569100).

06:38:08.275646 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.125 MiB for cuPHY PDCCH channel object (0x2de0a569600).

06:38:08.275787 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.185 MiB for cuPHY CSIRS channel object (0x2de016a3380).

06:38:08.275909 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.185 MiB for cuPHY CSIRS channel object (0x2de016a3680).

06:38:08.276030 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.185 MiB for cuPHY CSIRS channel object (0x2de016a3980).

06:38:08.276244 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.185 MiB for cuPHY CSIRS channel object (0x2de016a3c80).

06:38:08.276364 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.185 MiB for cuPHY CSIRS channel object (0x2de016a5780).

06:38:08.276476 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.185 MiB for cuPHY CSIRS channel object (0x2de016a5a80).

06:38:08.276582 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.185 MiB for cuPHY CSIRS channel object (0x2de016a5d80).

06:38:08.276687 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.185 MiB for cuPHY CSIRS channel object (0x2de016a6080).

06:38:08.276777 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.185 MiB for cuPHY CSIRS channel object (0x2de016a6380).

06:38:08.277059 WRN msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.185 MiB for cuPHY CSIRS channel object (0x2de016a6680).

06:38:08.277064 WRN msg_processing 0 [DRV.API] Update cell: mplane_id=2 dl_grid_sz=273

06:38:08.277064 WRN msg_processing 0 [DRV.API] Update cell: mplane_id=2 ul_grid_sz=273

06:38:08.278954 WRN timer_thread 0 [L2A.TICK] Thread slot_indication_thread_sleep_method initialized fmtlog

06:38:08.278957 WRN timer_thread 0 [L2A.TICK] PTP Configs: gps_alpha: 0 gps_beta: 0

06:38:08.440017 WRN timer_thread 0 [SCF.PHY] Cell 0 | DL 0.00 Mbps 0 Slots | UL 0.00 Mbps 0 Slots CRC 0 ( 0) | Tick 0

06:38:08.440018 WRN timer_thread 0 [SCF.PHY] Cell 1 | DL 0.00 Mbps 0 Slots | UL 0.00 Mbps 0 Slots CRC 0 ( 0) | Tick 0

06:38:08.446490 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 0.15 No available Aggr PUSCH objects

06:38:08.446510 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 0.15 for cell-id 0

06:38:08.446513 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 0.15 for cell-id 1

06:38:08.447115 WRN UlPhyDriver06 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688446664000 current_time 1730356688447115091 start_ch_task_time 1730356688446000000

06:38:08.447115 ERR UlPhyDriver06 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 2,Error detection too late. No UL Task Abort!

06:38:08.447117 ERR UlPhyDriver06 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=0 slot=14 for msg_id=0x07

06:38:08.447121 WRN UlPhyDriver06 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688446664000 current_time 1730356688447121619 start_ch_task_time 1730356688446000000

06:38:08.447121 ERR UlPhyDriver06 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 2,Error detection too late. No UL Task Abort!

06:38:08.447122 ERR UlPhyDriver06 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=0 slot=14 for msg_id=0x07

06:38:08.448801 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 2, SFN 0 Slot 14 Order kernel timeout error or Exit error for cell index 0 Dyn index 0!

06:38:08.448803 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 2, SFN 0 Slot 14 Order kernel timeout error or Exit error for cell index 1 Dyn index 1!

06:38:08.451487 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 1.5 No available Aggr PUSCH objects

06:38:08.451497 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 1.5 for cell-id 0

06:38:08.451506 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 1.5 for cell-id 1

06:38:08.456487 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 1.15 No available Aggr PUSCH objects

06:38:08.456496 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 1.15 for cell-id 0

06:38:08.456498 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 1.15 for cell-id 1

06:38:08.457051 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 2, SFN 0 Slot 14 PUSCH Pre Early Harq Wait kernel timeout!

06:38:08.457103 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 2, SFN 0 Slot 14 PUSCH Post Early Harq Wait kernel timeout!

06:38:08.457107 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688451664000 current_time 1730356688457107723 start_ch_task_time 1730356688451000000

06:38:08.457108 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 4,Error detection too late. No UL Task Abort!

06:38:08.457108 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=1 slot=4 for msg_id=0x07

06:38:08.457113 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688451664000 current_time 1730356688457113003 start_ch_task_time 1730356688451000000

06:38:08.457113 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 4,Error detection too late. No UL Task Abort!

06:38:08.457113 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=1 slot=4 for msg_id=0x07

06:38:08.460187 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 4, SFN 1 Slot 4 Order kernel timeout error or Exit error for cell index 0 Dyn index 0!

06:38:08.460187 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 4, SFN 1 Slot 4 Order kernel timeout error or Exit error for cell index 1 Dyn index 1!

06:38:08.461488 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 2.5 No available Aggr PUSCH objects

06:38:08.461498 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 2.5 for cell-id 0

06:38:08.461508 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 2.5 for cell-id 1

06:38:08.462308 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 4, SFN 1 Slot 4 PUSCH Pre Early Harq Wait kernel timeout!

06:38:08.462353 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688456664000 current_time 1730356688462353652 start_ch_task_time 1730356688456000000

06:38:08.462353 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 6,Error detection too late. No UL Task Abort!

06:38:08.462354 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=1 slot=14 for msg_id=0x07

06:38:08.462358 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688456664000 current_time 1730356688462358164 start_ch_task_time 1730356688456000000

06:38:08.462358 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 6,Error detection too late. No UL Task Abort!

06:38:08.462358 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=1 slot=14 for msg_id=0x07

06:38:08.465428 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 6, SFN 1 Slot 14 Order kernel timeout error or Exit error for cell index 0 Dyn index 0!

06:38:08.465429 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 6, SFN 1 Slot 14 Order kernel timeout error or Exit error for cell index 1 Dyn index 1!

06:38:08.466490 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 2.15 No available Aggr PUSCH objects

06:38:08.466499 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 2.15 for cell-id 0

06:38:08.466506 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 2.15 for cell-id 1

06:38:08.467550 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 6, SFN 1 Slot 14 PUSCH Pre Early Harq Wait kernel timeout!

06:38:08.467594 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688461664000 current_time 1730356688467594653 start_ch_task_time 1730356688461000000

06:38:08.467594 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 8,Error detection too late. No UL Task Abort!

06:38:08.467595 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=2 slot=4 for msg_id=0x07

06:38:08.467599 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688461664000 current_time 1730356688467599389 start_ch_task_time 1730356688461000000

06:38:08.467599 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 8,Error detection too late. No UL Task Abort!

06:38:08.467599 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=2 slot=4 for msg_id=0x07

06:38:08.470668 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 8, SFN 2 Slot 4 Order kernel timeout error or Exit error for cell index 0 Dyn index 0!

06:38:08.470669 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 8, SFN 2 Slot 4 Order kernel timeout error or Exit error for cell index 1 Dyn index 1!

06:38:08.471489 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 3.5 No available Aggr PUSCH objects

06:38:08.471499 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 3.5 for cell-id 0

06:38:08.471508 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 3.5 for cell-id 1

06:38:08.472766 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 8, SFN 2 Slot 4 PUSCH Pre Early Harq Wait kernel timeout!

06:38:08.472807 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688466664000 current_time 1730356688472807878 start_ch_task_time 1730356688466000000

06:38:08.472808 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 10,Error detection too late. No UL Task Abort!

06:38:08.472808 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=2 slot=14 for msg_id=0x07

06:38:08.472814 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688466664000 current_time 1730356688472814374 start_ch_task_time 1730356688466000000

06:38:08.472814 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 10,Error detection too late. No UL Task Abort!

06:38:08.472814 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=2 slot=14 for msg_id=0x07

06:38:08.475880 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 10, SFN 2 Slot 14 Order kernel timeout error or Exit error for cell index 0 Dyn index 0!

06:38:08.475881 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 10, SFN 2 Slot 14 Order kernel timeout error or Exit error for cell index 1 Dyn index 1!

06:38:08.476487 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 3.15 No available Aggr PUSCH objects

06:38:08.476496 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 3.15 for cell-id 0

06:38:08.476498 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 3.15 for cell-id 1

06:38:08.477963 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 10, SFN 2 Slot 14 PUSCH Pre Early Harq Wait kernel timeout!

06:38:08.478011 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688471664000 current_time 1730356688478011951 start_ch_task_time 1730356688471000000

06:38:08.478012 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 12,Error detection too late. No UL Task Abort!

06:38:08.478012 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=3 slot=4 for msg_id=0x07

06:38:08.478018 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688471664000 current_time 1730356688478018031 start_ch_task_time 1730356688471000000

06:38:08.478018 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 12,Error detection too late. No UL Task Abort!

06:38:08.478018 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=3 slot=4 for msg_id=0x07

06:38:08.481090 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 12, SFN 3 Slot 4 Order kernel timeout error or Exit error for cell index 0 Dyn index 0!

06:38:08.481091 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 12, SFN 3 Slot 4 Order kernel timeout error or Exit error for cell index 1 Dyn index 1!

06:38:08.481487 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 4.5 No available Aggr PUSCH objects

06:38:08.481497 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 4.5 for cell-id 0

06:38:08.481507 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 4.5 for cell-id 1

06:38:08.483165 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 12, SFN 3 Slot 4 PUSCH Pre Early Harq Wait kernel timeout!

06:38:08.483212 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688476664000 current_time 1730356688483212793 start_ch_task_time 1730356688476000000

06:38:08.483213 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 14,Error detection too late. No UL Task Abort!

06:38:08.483213 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=3 slot=14 for msg_id=0x07

06:38:08.483217 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688476664000 current_time 1730356688483217497 start_ch_task_time 1730356688476000000

06:38:08.483217 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 14,Error detection too late. No UL Task Abort!

06:38:08.483217 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=3 slot=14 for msg_id=0x07

06:38:08.486288 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 14, SFN 3 Slot 14 Order kernel timeout error or Exit error for cell index 0 Dyn index 0!

06:38:08.486290 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 14, SFN 3 Slot 14 Order kernel timeout error or Exit error for cell index 1 Dyn index 1!

06:38:08.486486 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 4.15 No available Aggr PUSCH objects

06:38:08.486496 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 4.15 for cell-id 0

06:38:08.486498 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 4.15 for cell-id 1

06:38:08.488375 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 14, SFN 3 Slot 14 PUSCH Pre Early Harq Wait kernel timeout!

06:38:08.488419 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688481664000 current_time 1730356688488419298 start_ch_task_time 1730356688481000000

06:38:08.488419 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 16,Error detection too late. No UL Task Abort!

06:38:08.488419 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=4 slot=4 for msg_id=0x07

06:38:08.488424 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688481664000 current_time 1730356688488424418 start_ch_task_time 1730356688481000000

06:38:08.488424 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 16,Error detection too late. No UL Task Abort!

06:38:08.488424 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=4 slot=4 for msg_id=0x07

06:38:08.491486 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 5.5 No available Aggr PUSCH objects

06:38:08.491490 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 16, SFN 4 Slot 4 Order kernel timeout error or Exit error for cell index 0 Dyn index 0!

06:38:08.491491 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 16, SFN 4 Slot 4 Order kernel timeout error or Exit error for cell index 1 Dyn index 1!

06:38:08.491497 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 5.5 for cell-id 0

06:38:08.491499 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 5.5 for cell-id 1

06:38:08.493581 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 16, SFN 4 Slot 4 PUSCH Pre Early Harq Wait kernel timeout!

06:38:08.493624 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688486664000 current_time 1730356688493624332 start_ch_task_time 1730356688486000000

06:38:08.493624 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 18,Error detection too late. No UL Task Abort!

06:38:08.493624 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=4 slot=14 for msg_id=0x07

06:38:08.493628 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688486664000 current_time 1730356688493628908 start_ch_task_time 1730356688486000000

06:38:08.493628 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 18,Error detection too late. No UL Task Abort!

06:38:08.493629 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=4 slot=14 for msg_id=0x07

06:38:08.496487 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 5.15 No available Aggr PUSCH objects

06:38:08.496497 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 5.15 for cell-id 0

06:38:08.496507 WRN msg_processing 0 [SCF.PHY] L1 Enqueue Error on SFN 5.15 for cell-id 1

06:38:08.496692 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 18, SFN 4 Slot 14 Order kernel timeout error or Exit error for cell index 0 Dyn index 0!

06:38:08.496693 ERR UlPhyDriver06 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 18, SFN 4 Slot 14 Order kernel timeout error or Exit error for cell index 1 Dyn index 1!

06:38:08.498774 ERR UlPhyDriver05 0 [AERIAL_CUPHY_API_EVENT] [DRV.FUNC_UL] Slot Map 18, SFN 4 Slot 14 PUSCH Pre Early Harq Wait kernel timeout!

06:38:08.498815 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688491664000 current_time 1730356688498815669 start_ch_task_time 1730356688491000000

06:38:08.498815 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 0 error type 2 Map 20,Error detection too late. No UL Task Abort!

06:38:08.498816 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=5 slot=4 for msg_id=0x07

06:38:08.498822 WRN UlPhyDriver05 0 [DRV.FH] sendCPlane_timingCheck : sendCPlane Timing error for ULC. Too late to abort UL tasks start_tx_time 1730356688491664000 current_time 1730356688498821973 start_ch_task_time 1730356688491000000

06:38:08.498822 ERR UlPhyDriver05 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.FUNC_UL] UL C-plane send timing error for cell index 1 error type 2 Map 20,Error detection too late. No UL Task Abort!

06:38:08.498822 ERR UlPhyDriver05 0 [AERIAL_L2ADAPTER_EVENT] [SCF.PHY] Send SLOT error indication from L1 SFN=5 slot=4 for msg_id=0x07

06:38:08.501491 ERR msg_processing 0 [AERIAL_CUPHYDRV_API_EVENT] [DRV.API] SFN 6.5 No available Aggr PUSCH objects
10

would you please check whether the PTP on GH and RU-emulator are synced? Please share the outputs of two commands on both nodes.
sudo systemctl status ptp4l.service
sudo systemctl status phc2sys.service

If you confirm the PTP are synced but still have the problem shown above, then need to the if the NIC Pcie address and MAC address on GH and RU-emualator are properly configured. would you please share the RU-emulator config as well?

11

Thanks for your reply! I will check the setting you mentioned!

12

Would you please share test_mac_config.yaml, too?
If you intend to enable the following for early HARQ, you may need to take care of the testMAC configuration.
mCh_segment_proc_enable: 1

13

I am facing the same issue.

The output of cuBB_system_checks scripts inside the container does not show values for Mellanox NICs, Mellanox NIC Interfaces, and Linux PTP, just like root1031’s reply.

The simulation is being followed according to the version 24-1 guide, and the hardware setup consists of only a Dell R760 + A100X.

  • Can Aerial cuBB be implemented with just the Dell R760 + A100X, or is it necessary for the DU and RU to be separate? I plan to purchase a Dell R760 for the RU later.
  • This error was found in the Aerial System Scripts. Can this error be resolved with the current hardware setup?
  • Even if we skip this issue, is it still possible to continue the cuBB simulation to some extent?