Hi,
J16 and J23 are two COM port connectors. May I ask which ttyTHS interfaces they correspond to? Currently, the kernel only appears to enable ttyTHS0, 1, and 3.
Thanks
Hi,
Not sure which device you use. Could you attach a picture of the device for reference?
Hi,
J16 and J23 are not connected to UART ports of Orin so the ports are not mapped to ttyTHS0, ttyTHS1, ttyTHS3.
The hardware connection is
PCIe C1 x1 – PCIE switch – CH384L – COM ports J16 and J23
Please reboot the system to get clean dmesg. And attach it for reference.
Hi,
Please run $ lspci -v and share the prints for reference. In dmesg, we can see the PCIe switch is detected:
[ 8.827920] tegra194-pcie 14100000.pcie: Using GICv2m MSI allocator
[ 8.940560] tegra194-pcie 14100000.pcie: host bridge /pcie@14100000 ranges:
[ 8.940781] tegra194-pcie 14100000.pcie: IO 0x0030100000..0x00301fffff -> 0x0030100000
[ 8.941033] tegra194-pcie 14100000.pcie: MEM 0x20a8000000..0x20afffffff -> 0x0040000000
[ 8.941265] tegra194-pcie 14100000.pcie: MEM 0x2080000000..0x20a7ffffff -> 0x2080000000
[ 9.047012] tegra194-pcie 14100000.pcie: Link up
[ 9.050697] tegra194-pcie 14100000.pcie: PCI host bridge to bus 0001:00
Some devices are initialized:
[ 12.022070] r8169 0001:03:00.0: Adding to iommu group 7
[ 12.022369] r8169 0001:03:00.0: enabling device (0000 -> 0003)
[ 12.038397] r8169 0001:03:00.0 eth2: RTL8168h/8111h, 48:b0:2d:ee:7a:02, XID 541, IRQ 320
[ 12.038401] r8169 0001:03:00.0 eth2: jumbo features [frames: 9194 bytes, tx checksumming: ko]
[ 12.038696] r8169 0001:04:00.0: Adding to iommu group 7
[ 12.038959] r8169 0001:04:00.0: enabling device (0000 -> 0003)
[ 12.057851] r8169 0001:04:00.0 eth3: RTL8168h/8111h, 48:b0:2d:ee:7a:03, XID 541, IRQ 321
[ 12.057854] r8169 0001:04:00.0 eth3: jumbo features [frames: 9194 bytes, tx checksumming: ko]
[ 12.610346] ath10k_pci 0001:08:00.0: Adding to iommu group 7
[ 12.611419] ath10k_pci 0001:08:00.0: enabling device (0000 -> 0002)
[ 12.613261] ath10k_pci 0001:08:00.0: pci irq msi oper_irq_mode 2 irq_mode 0 reset_mode 0
[ 12.914559] ath10k_pci 0001:08:00.0: qca6174 hw3.2 target 0x05030000 chip_id 0x00340aff sub 168c:3361
[ 12.914568] ath10k_pci 0001:08:00.0: kconfig debug 0 debugfs 1 tracing 0 dfs 0 testmode 0
[ 12.914629] ath10k_pci 0001:08:00.0: firmware ver WLAN.RM.4.4.1-00140-QCARMSWPZ-1 api 6 features wowlan,ignore-otp,mfp crc32 29eb8ca1
But the COM ports are not initialized. It seems like driver of CH384L is not enabled. Please share the prints of lspci -v to make sure the device is listed.
Hi,
The two ports are not enabled in default system image. Will you connect any device to the ports in your use-case? Would like to get more information about the use-case.
Hi,
Currently in testing, we only need to cross-connect the TX/RX pins of the J16 and J23 connectors to test the data transmission between the two UART ports and verify data accuracy. In the future, we will consider extending these two connectors to the external chassis, providing COM port interfaces for customer use.
By the way, are connectors J33 and J35 also disabled by default in the current system image?
Hi,
Please create a new topic for J33 and J35. Would like to keep this for discussing about J16 and J23.
Just checked with our teams and realized it is listed in release notes:
5. Known Issues
The following drivers are missing and will be added in the next release:
*IGX drivers for fans and ch384 UART drivers.