Jetpack 4.2.1- L4T 32.2-Tegra TX2- understand PCIE: Response decoding error, signature: XXXXXX

We are getting the following error

[Sep16 09:53] tegra-pcie 10003000.pcie-controller: PCIE: Response decoding error, signature: 164102e0
[  +0.009094] tegra-pcie 10003000.pcie-controller: PCIE: Response decoding error, signature: 16410004
[ +20.054834] tegra-pcie 10003000.pcie-controller: PCIE: Response decoding error, signature: 1641020c
[  +0.009073] tegra-pcie 10003000.pcie-controller: PCIE: Response decoding error, signature: 16410004

When i looked in the PCIe driver i found that this is indicating
“7 = INT_CODE_DFPCI_DECERR: Interrupt code for PCIE2 response to downstream request when downstream FPCI
address does not fall in a claimable downstream region”

Just to brief about what our configuration is
I have a configuration where Tegra Pcie port i connected to IDT switch and each port of the switch we have Tegra Tx2. All ports of the switch is configured to be upstream port and we are trying to do pcie transfer.

Our driver was working fine on Jetpack 3.3 and we are planning to move to 4.2.1. We see lots of configuration for PCie as well as ARM64 has been added and looks like for some of the configuration our driver is not compatible. Might be this error is bcos of that.

The lspci is shown below

00:01.0 PCI bridge: NVIDIA Corporation Device 10e5 (rev a1) (prog-if 00 [Normal decode])
	Flags: bus master, fast devsel, latency 0, IRQ 381
	Bus: primary=00, secondary=01, subordinate=02, sec-latency=0
	Memory behind bridge: 41000000-43ffffff
	Prefetchable memory behind bridge: 0000000060000000-000000007fffffff
	Capabilities: <access denied>
	Kernel driver in use: pcieport

01:00.0 PCI bridge: Microsemi / PMC / IDT 89HPES32NT8AG2 32-Lane 8-Port PCIe Gen2 System Interconnect Switch with Non-Transparent Bridging (rev 02) (prog-if 00 [Normal decode])
	Flags: bus master, fast devsel, latency 0
	Bus: primary=01, secondary=02, subordinate=02, sec-latency=0
	Capabilities: <access denied>
	Kernel driver in use: pcieport

01:00.1 Bridge: Microsemi / PMC / IDT 89HPES32NT8AG2 32-Lane 8-Port PCIe Gen2 System Interconnect Switch with Non-Transparent Bridging (rev 02)
	Flags: bus master, fast devsel, latency 0, IRQ 446
	Memory at 41000000 (64-bit, non-prefetchable) 
	Memory at 60000000 (64-bit, prefetchable) 
	Memory at 42000000 (64-bit, non-prefetchable) 
	Capabilities: <access denied>
	Kernel driver in use: idt-g2-ntb

Q1. I wanted to know how can i get the FPCI address from the signature for example 164102e0, where the PCIe is responding with this error and what it is indicating.
Q2. Any def config parameters need to be set or unset?

Looking at the log, I think you must be using NT configuration of the switch and connecting TX2 to one of the switch’s ports.
In the error signature, [31:2] represents the address and bit-0 represents read/write (1-read and 0-write)
If I understand it correctly, you would be using one of the BARs as a window for read & writes to the other side of NT bridge. Going by that, addresses from signature don’t fall into any of the BARs. Please check why is going off the BAR region here?