JETPACK 4.2 Camera Bringup Issue

Hi.
We will bring up the Jetpack 4.2 camera from TX2 board.

We are bring up a camera that has its own ISP.
So we made the necessary settings for the device tree.

So we first confirmed that it works in Jetpack 3.1.
The camera worked well with JETPACK 3.1.

Jetpack 4.2 also sets only the essential values for the device tree.
However, Jetpack 4.2 does not work.

Strange thing
Lowering the camera clock will work.

We thought that we did not need any special settings related to Clock to use ISP, but …
I am embarrassed to have a problem with Jetpack 4.2.

The settings in Jetpack 3.1 are almost identical to those in Jetpack 4.2.
As shown below.

We desperately want the issue resolved.

Thank you for your help.

Thank you.

JETPACK 3.1

/ {
host1x {
vi@15700000 {
num-channels = <3>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
hmns0000_aggregate_vi_in0: endpoint {
csi-port = <0>;
bus-width = <4>;
remote-endpoint = <&hmns0000_aggregate_csi_out0>;
};
};
port@1 {
reg = <1>;
hmns0000_aggregate_vi_in1: endpoint {
csi-port = <2>;
bus-width = <4>;
remote-endpoint = <&hmns0000_aggregate_csi_out1>;
};
};
port@2 {
reg = <2>;
hmns0000_aggregate_vi_in2: endpoint {
csi-port = <4>;
bus-width = <4>;
remote-endpoint = <&hmns0000_aggregate_csi_out2>;
};
};
};
};

	nvcsi@150c0000 {
		num-channels = <3>;
		#address-cells = <1>;
		#size-cells = <0>;
		channel@0 {
			reg = <0>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					hmns0000_aggregate_csi_in0: endpoint@0 {
						csi-port = <0>;
						bus-width = <4>;
						remote-endpoint = <&hmns0000_aggregate_hmns0000_out0>;
					};
				};
				port@1 {
					reg = <1>;
					hmns0000_aggregate_csi_out0: endpoint@1 {
						remote-endpoint = <&hmns0000_aggregate_vi_in0>;
					};
				};
			};
		};
		channel@1 {
			reg = <1>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					hmns0000_aggregate_csi_in1: endpoint@2 {
						csi-port = <2>;
						bus-width = <4>;
						remote-endpoint = <&hmns0000_aggregate_hmns0000_out1>;
					};
				};
				port@1 {
					reg = <1>;
					hmns0000_aggregate_csi_out1: endpoint@3 {
						remote-endpoint = <&hmns0000_aggregate_vi_in1>;
					};
				};
			};
		};
		channel@2 {
			reg = <2>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					hmns0000_aggregate_csi_in2: endpoint@4 {
						csi-port = <4>;
						bus-width = <4>;
						remote-endpoint = <&hmns0000_aggregate_hmns0000_out2>;
					};
				};
				port@1 {
					reg = <1>;
					hmns0000_aggregate_csi_out2: endpoint@5 {
						remote-endpoint = <&hmns0000_aggregate_vi_in2>;
					};
				};
			};
		};
	};
};

i2c@3180000 {
	hmns0000@10 {
		compatible = "nvidia,hmns0000";
		/* I2C device address */
		reg = <0x10>;

		mode0 { //1280x720
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_a";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";

			active_w = "1280";
			active_h = "720";
			pixel_t = "uyvy";
			line_length = "1280";
			pix_clk_hz = "74000000";

			min_framerate = "1";
			max_framerate = "30";
			embedded_metadata_height = "0";
		};
		mode1 { //1280x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_a";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "1280";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "1280";
		};
		mode2 { //2560x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_a";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "2560";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "2560";
		};
		mode3 { //3840x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_a";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "3840";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "3840";
		};
		mode4 { //5120x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_a";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "5120";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "5120";
		};
		mode5 { //HMNS0000_MODE_1920X1208
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_a";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";
			
			active_w = "1920";
			active_h = "1208";
			pixel_t = "bayer_rggb";
			readout_orientation = "0";
			line_length = "1354";
			inherent_gain = "1";
			mclk_multiplier = "25";
			pix_clk_hz = "84000000";

			gain_factor = "16";
			framerate_factor = "1";
			min_gain_val = "1";
			max_gain_val = "256";
			min_exp_time = "34";
			max_exp_time = "999994";
			min_framerate = "1";
			max_framerate = "30";
			embedded_metadata_height = "24";
		};

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				hmns0000_aggregate_hmns0000_out0: endpoint {
					csi-port = <0>;
					bus-width = <4>;
					remote-endpoint = <&hmns0000_aggregate_csi_in0>;
				};
			};
		};
	};
	hmns0000@20 {
		compatible = "nvidia,hmns0000";
		/* I2C device address */
		reg = <0x20>;

		mode0 { //1280x720
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";

			active_w = "1280";
			active_h = "720";
			pixel_t = "uyvy";
			line_length = "1280";
			pix_clk_hz = "74000000";

			min_framerate = "1";
			max_framerate = "30";
			embedded_metadata_height = "0";
		};
		mode1 { //1280x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "1280";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "1280";
		};
		mode2 { //2560x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "2560";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "2560";
		};
		mode3 { //3840x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "3840";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "3840";
		};
		mode4 { //5120x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "5120";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "5120";
		};
		mode5 { //HMNS0000_MODE_1920X1208
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";
			
			active_w = "1920";
			active_h = "1208";
			pixel_t = "bayer_rggb";
			readout_orientation = "0";
			line_length = "1354";
			inherent_gain = "1";
			mclk_multiplier = "25";
			pix_clk_hz = "84000000";

			gain_factor = "16";
			framerate_factor = "1";
			min_gain_val = "1";
			max_gain_val = "256";
			min_exp_time = "34";
			max_exp_time = "999994";
			min_framerate = "1";
			max_framerate = "30";
			embedded_metadata_height = "24";
		};

		mode6 { //1920x1080
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			discontinuous_clk = "no";
			cil_settletime = "0";


			active_w = "1920";
			active_h = "1080";
			pixel_t = "uyvy";

			line_length = "1920";
		};
		mode7 { //3840x1080
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "3840";
			active_h = "1080";
			pixel_t = "uyvy";

			line_length = "3840";
		};

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				hmns0000_aggregate_hmns0000_out1: endpoint {
					csi-port = <2>;
					bus-width = <4>;
					remote-endpoint = <&hmns0000_aggregate_csi_in1>;
				};
			};
		};
	};
	hmns0000@40 {
		compatible = "nvidia,hmns0000";
		/* I2C device address */
		reg = <0x40>;

		mode0 { //1280x720
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";

			active_w = "1280";
			active_h = "720";
			pixel_t = "uyvy";
			line_length = "1280";
			pix_clk_hz = "74000000";

			min_framerate = "1";
			max_framerate = "30";
			embedded_metadata_height = "0";
		};
		mode1 { //1280x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "1280";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "1280";
		};
		mode2 { //2560x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "2560";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "2560";
		};
		mode3 { //3840x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "3840";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "3840";
		};
		mode4 { //5120x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "5120";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "5120";
		};
		mode5 { //HMNS0000_MODE_1920X1208
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";
			
			active_w = "1920";
			active_h = "1208";
			pixel_t = "bayer_rggb";
			readout_orientation = "0";
			line_length = "1354";
			inherent_gain = "1";
			mclk_multiplier = "25";
			pix_clk_hz = "84000000";

			gain_factor = "16";
			framerate_factor = "1";
			min_gain_val = "1";
			max_gain_val = "256";
			min_exp_time = "34";
			max_exp_time = "999994";
			min_framerate = "1";
			max_framerate = "30";
			embedded_metadata_height = "24";
		};

		mode6 { //1920x1080
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "1920";
			active_h = "1080";
			pixel_t = "uyvy";

			line_length = "1920";
		};
		mode7 { //3840x1080
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "3840";
			active_h = "1080";
			pixel_t = "uyvy";

			line_length = "3840";
		};

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				hmns0000_aggregate_hmns0000_out2: endpoint {
					csi-port = <4>;
					bus-width = <4>;
					remote-endpoint = <&hmns0000_aggregate_csi_in2>;
				};
			};
		};
	};
};

tegra-camera-platform {
	compatible = "nvidia, tegra-camera-platform";
	/**
	* Physical settings to calculate max ISO BW
	*
	* num_csi_lanes = <>;
	* Total number of CSI lanes when all cameras are active
	*
	* max_lane_speed = <>;
	* Max lane speed in Kbit/s
	*
	* min_bits_per_pixel = <>;
	* Min bits per pixel
	*
	* vi_peak_byte_per_pixel = <>;
	* Max byte per pixel for the VI ISO case
	*
	* vi_bw_margin_pct = <>;
	* Vi bandwidth margin in percentage
	*
	* max_pixel_rate = <>;
	* Max pixel rate in Kpixel/s for the ISP ISO case
	*
	* isp_peak_byte_per_pixel = <>;
	* Max byte per pixel for the ISP ISO case
	*
	* isp_bw_margin_pct = <>;
	* Isp bandwidth margin in percentage
	*/
	num_csi_lanes = <12>;
	max_lane_speed = <1500000>;
	min_bits_per_pixel = <10>;
	vi_peak_byte_per_pixel = <2>;
	vi_bw_margin_pct = <25>;
	max_pixel_rate = <750000>;
	isp_peak_byte_per_pixel = <5>;
	isp_bw_margin_pct = <25>;
};

};

JETPACK 3.1

/ {
host1x {
vi@15700000 {
num-channels = <3>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
hmns0000_aggregate_vi_in0: endpoint {
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&hmns0000_aggregate_csi_out0>;
};
};
port@1 {
reg = <1>;
hmns0000_aggregate_vi_in1: endpoint {
port-index = <2>;
bus-width = <2>;
remote-endpoint = <&hmns0000_aggregate_csi_out1>;
};
};
port@2 {
reg = <2>;
hmns0000_aggregate_vi_in2: endpoint {
csi-port = <4>;
bus-width = <4>;
remote-endpoint = <&hmns0000_aggregate_csi_out2>;
};
};
};
};

	nvcsi@150c0000 {
		num-channels = <3>;
		#address-cells = <1>;
		#size-cells = <0>;
		channel@0 {
			reg = <0>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					hmns0000_aggregate_csi_in0: endpoint@0 {
						port-index = <0>;
						bus-width = <4>;
						remote-endpoint = <&hmns0000_aggregate_hmns0000_out0>;
					};
				};
				port@1 {
					reg = <1>;
					hmns0000_aggregate_csi_out0: endpoint@1 {
						remote-endpoint = <&hmns0000_aggregate_vi_in0>;
					};
				};
			};
		};
		channel@1 {
			reg = <1>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					hmns0000_aggregate_csi_in1: endpoint@2 {
						port-index = <2>;
						bus-width = <2>;
						remote-endpoint = <&hmns0000_aggregate_hmns0000_out1>;
					};
				};
				port@1 {
					reg = <1>;
					hmns0000_aggregate_csi_out1: endpoint@3 {
						remote-endpoint = <&hmns0000_aggregate_vi_in1>;
					};
				};
			};
		};
		channel@2 {
			reg = <2>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					hmns0000_aggregate_csi_in2: endpoint@4 {
						csi-port = <4>;
						bus-width = <4>;
						remote-endpoint = <&hmns0000_aggregate_hmns0000_out2>;
					};
				};
				port@1 {
					reg = <1>;
					hmns0000_aggregate_csi_out2: endpoint@5 {
						remote-endpoint = <&hmns0000_aggregate_vi_in2>;
					};
				};
			};
		};
	};
};

i2c@3180000 {
	hmns0000@10 {
		compatible = "nvidia,hmns0000";
		/* I2C device address */
		reg = <0x10>;

		mode0 { //1280x720
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_a";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";

			active_w = "1280";
			active_h = "720";
			pixel_t = "uyvy";
			line_length = "1280";
			pix_clk_hz = "74000000";

			min_framerate = "1";
			max_framerate = "30";
			embedded_metadata_height = "0";
		};
		mode1 { //1280x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_a";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "1280";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "1280";
			embedded_metadata_height = "0";
		};
		mode2 { //2560x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_a";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "2560";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "2560";
			embedded_metadata_height = "0";
		};
		mode3 { //3840x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_a";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "3840";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "3840";
			embedded_metadata_height = "0";
		};
		mode4 { //5120x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_a";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "5120";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "5120";
			embedded_metadata_height = "0";
		};
		mode5 { //HMNS0000_MODE_1920X1208
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_a";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";
			
			active_w = "1920";
			active_h = "1208";
			pixel_t = "bayer_rggb";
			readout_orientation = "0";
			line_length = "1354";
			inherent_gain = "1";
			mclk_multiplier = "25";
			pix_clk_hz = "84000000";

			gain_factor = "16";
			framerate_factor = "1";
			min_gain_val = "1";
			max_gain_val = "256";
			min_exp_time = "34";
			max_exp_time = "999994";
			min_framerate = "1";
			max_framerate = "30";
			embedded_metadata_height = "24";
		};

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				hmns0000_aggregate_hmns0000_out0: endpoint {
					port-index = <0>;
					bus-width = <4>;
					remote-endpoint = <&hmns0000_aggregate_csi_in0>;
				};
			};
		};
	};
	hmns0000@20 {
		compatible = "nvidia,hmns0000";
		/* I2C device address */
		reg = <0x20>;

		mode0 { //1280x720
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";

			active_w = "1280";
			active_h = "720";
			pixel_t = "uyvy";
			line_length = "1280";
			pix_clk_hz = "74000000";

			min_framerate = "1";
			max_framerate = "30";
			embedded_metadata_height = "0";
		};
		mode1 { //1280x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "1280";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "1280";
			embedded_metadata_height = "0";
		};
		mode2 { //2560x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "2560";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "2560";
			embedded_metadata_height = "0";
		};
		mode3 { //3840x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "3840";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "3840";
			embedded_metadata_height = "0";
		};
		mode4 { //5120x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "5120";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "5120";
			embedded_metadata_height = "0";
		};
		mode5 { //HMNS0000_MODE_1920X1208
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_c";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";
			
			active_w = "1920";
			active_h = "1208";
			pixel_t = "bayer_rggb";
			readout_orientation = "0";
			line_length = "1354";
			inherent_gain = "1";
			mclk_multiplier = "25";
			pix_clk_hz = "84000000";

			gain_factor = "16";
			framerate_factor = "1";
			min_gain_val = "1";
			max_gain_val = "256";
			min_exp_time = "34";
			max_exp_time = "999994";
			min_framerate = "1";
			max_framerate = "30";
			embedded_metadata_height = "24";
		};
        mode6 { //1920x1080
            mclk_khz = "24000";
            num_lanes = "4";
            tegra_sinterface = "serial_c";
			phy_mode = "DPHY";
            discontinuous_clk = "no";
            cil_settletime = "0";

            active_w = "1920";
            active_h = "1080";
            pixel_t = "uyvy";

            line_length = "1920";
			embedded_metadata_height = "0";
        };
        mode7 { //3840x1080
            mclk_khz = "24000";
            num_lanes = "4";
            tegra_sinterface = "serial_c";
			phy_mode = "DPHY";
            discontinuous_clk = "no";
            cil_settletime = "0";

            active_w = "3840";
            active_h = "1080";
            pixel_t = "uyvy";

            line_length = "3840";
			embedded_metadata_height = "0";
        };

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				hmns0000_aggregate_hmns0000_out1: endpoint {
					port-index = <2>;
					bus-width = <2>;
					remote-endpoint = <&hmns0000_aggregate_csi_in1>;
				};
			};
		};
	};
	hmns0000@40 {
		compatible = "nvidia,hmns0000";
		/* I2C device address */
		reg = <0x40>;

		mode0 { //1280x720
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";

			active_w = "1280";
			active_h = "720";
			pixel_t = "uyvy";
			line_length = "1280";
			pix_clk_hz = "74000000";

			min_framerate = "1";
			max_framerate = "30";
			embedded_metadata_height = "0";
		};
		mode1 { //1280x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "1280";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "1280";
			embedded_metadata_height = "0";
		};
		mode2 { //2560x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "2560";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "2560";
			embedded_metadata_height = "0";
		};
		mode3 { //3840x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "3840";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "3840";
			embedded_metadata_height = "0";
		};
		mode4 { //5120x800
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "5120";
			active_h = "800";
			pixel_t = "uyvy";

			line_length = "5120";
			embedded_metadata_height = "0";
		};
		mode5 { //HMNS0000_MODE_1920X1208
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";
			
			active_w = "1920";
			active_h = "1208";
			pixel_t = "bayer_rggb";
			readout_orientation = "0";
			line_length = "1354";
			inherent_gain = "1";
			mclk_multiplier = "25";
			pix_clk_hz = "84000000";

			gain_factor = "16";
			framerate_factor = "1";
			min_gain_val = "1";
			max_gain_val = "256";
			min_exp_time = "34";
			max_exp_time = "999994";
			min_framerate = "1";
			max_framerate = "30";
			embedded_metadata_height = "24";
		};
		mode6 { //1920x1080
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "1920";
			active_h = "1080";
			pixel_t = "uyvy";

			line_length = "1920";
			embedded_metadata_height = "0";
		};
		mode7 { //3840x1080
			mclk_khz = "24000";
			num_lanes = "4";
			tegra_sinterface = "serial_e";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			cil_settletime = "0";

			active_w = "3840";
			active_h = "1080";
			pixel_t = "uyvy";

			line_length = "3840";
			embedded_metadata_height = "0";
		};

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				hmns0000_aggregate_hmns0000_out2: endpoint {
					port-index = <4>;
					bus-width = <4>;
					remote-endpoint = <&hmns0000_aggregate_csi_in2>;
				};
			};
		};
	};
};

tegra-camera-platform {
	compatible = "nvidia, tegra-camera-platform";
	/**
	* Physical settings to calculate max ISO BW
	*
	* num_csi_lanes = <>;
	* Total number of CSI lanes when all cameras are active
	*
	* max_lane_speed = <>;
	* Max lane speed in Kbit/s
	*
	* min_bits_per_pixel = <>;
	* Min bits per pixel
	*
	* vi_peak_byte_per_pixel = <>;
	* Max byte per pixel for the VI ISO case
	*
	* vi_bw_margin_pct = <>;
	* Vi bandwidth margin in percentage
	*
	* max_pixel_rate = <>;
	* Max pixel rate in Kpixel/s for the ISP ISO case
	*
	* isp_peak_byte_per_pixel = <>;
	* Max byte per pixel for the ISP ISO case
	*
	* isp_bw_margin_pct = <>;
	* Isp bandwidth margin in percentage
	*/
	num_csi_lanes = <12>;
	max_lane_speed = <1500000>;
	min_bits_per_pixel = <10>;
	vi_peak_byte_per_pixel = <2>;
	vi_bw_margin_pct = <25>;
	max_pixel_rate = <750000>;
	isp_peak_byte_per_pixel = <5>;
	isp_bw_margin_pct = <25>;
};

};

In L4T R32.1 (included with Jetpack 4.2) the csi-port device tree parameter has been renamed to port-index. If this doesn’t solve your problem can you post kernel output (dmesg)?

Regards,
Greg

HI Greg
csi-port -> port-index has been modified.

I will attach the log.
  Logs when the camera is running.
[ 302.855785] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 302.862303] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[ 302.872450] nvcsi 150c0000.nvcsi: csi4_stream_check_status (4) ERROR_STATUS2VI_VC0 = 0x00000004
[ 302.881239] nvcsi 150c0000.nvcsi: csi4_stream_check_status (4) INTR_STATUS 0x00000004
[ 302.889188] nvcsi 150c0000.nvcsi: csi4_stream_check_status (4) ERR_INTR_STATUS 0x00000004

Regards,

HI Greg
It is strange.

For debugging in JETPACK4.2
I did the following

The image is output.

What causes it?
Please help me.

sudo water
echo 1> / sys / kernel / debug / bpmp / debug / clk / vi / mrq_rate_locked
echo 1> / sys / kernel / debug / bpmp / debug / clk / isp / mrq_rate_locked
echo 1> / sys / kernel / debug / bpmp / debug / clk / nvcsi / mrq_rate_locked
cat / sys / kernel / debug / bpmp / debug / clk / vi / max_rate
cat / sys / kernel / debug / bpmp / debug / clk / isp / max_rate
cat / sys / kernel / debug / bpmp / debug / clk / nvcsi / max_rate
echo { max_rate}> / sys / kernel / debug / bpmp / debug / clk / vi / rate echo { max_rate}> / sys / kernel / debug / bpmp / debug / clk / isp / rate
echo {$ max_rate} / sys / kernel / debug / bpmp / debug / clk / nvcsi / rate

Of course, {$ max_rate} is set to the value read by cat

HI Greg

Only with the following command

echo 1 | sudo tee /sys/kernel/debug/bpmp/debug/clk/nvcsi/mrq_rate_locked > /dev/null

The camera works well.

Is it possible to set the above settings in the Device tree?

hello soo_HyundaiMnSoft,

had you refer to Camera Sensor Drivers Porting Guide to check the difference.
thanks

soo_HyundaiMnSoft,

Look carefully ad pix_clk_hz and serdes_pix_clk_hz device tree parameters. pix_clk_hz needs to match the pixel clock of your image sensor. serdes_clk_hz needs to match the pixel clock of the device sending CSI data to the Jetson. In some cases the image sensor is not directly connected to the CSI port as is the case with serdes solution (e.g.GMSL2, FPDLink-III).

Regards,
Greg

I meet the same problem.

And I let serdes_pix_clk_hz equals pix_clk_hz,but useless.

Do I need set “echo … /dev/null” everytime if I capture from the video0 ???

Check tegra-camera-platform device tree settings. We recently had a similar problem where max_lane_speed was set too low. On R28 it didn’t seem to be an issue but on R32 we could get frames via v4l2 but not via Argus until we fixed this setting.

Regards,
Greg

Thanks for your reply.
The “max_lane_speed” is <1500000>,but useless.

I doubled the pix_clk_hz,and can get the picture now.
It seems nvidia modified the formula for pix_clk_hz.

In jetPack3.3,I used the formula : pixel_clk_hz = sensor output size * frame rate

In jetPack4.2,I used the formula :
pixel_clk_hz = sensor data rate per lane (Mbps) * number of lanes / bits per pixel

hello XuXiang,

thanks for updating.
FYI, we had Sensor Driver Programming Guide to mention [Sensor Pixel Clock] calculation formulas.
thanks

Do I need to set the ‘pix_clk_hz’ even though I do not have ‘Argus’ and I have the ISP of the camera itself?
I set pix_clk_hz = 0 so that only errors do not occur.

Defined pix_clk_hz and Video is output.
Thank you all.