However, when I went to read the corresponding register, I found that the register did not set the GPIO to output mode, but remained in the default input mode, as shown below:
After executing the following command, I successfully set the PAC.04 PIN to GPIO output mode and pulled it up to output a high level.
I am unsure why the device tree configuration was not synchronized to the register configuration. I would like to ask how to multiplex the PAC.04 pin as GPIO and set it to output mode in the driver development source code? Thank you!
Hi,
If the device cannot be flashed/booted, please refer to the page to get uart log from the device: Jetson/General debug - eLinux.org
And get logs of host PC and Jetson device for reference. If you are using custom board, you can compare uart log of developer kit and custom board to get more information.
Also please check FAQs: Jetson AGX Orin FAQ
If possible, we would suggest follow quick start in developer guide to re-flash the system: Quick Start — NVIDIA Jetson Linux Developer Guide 1 documentation
And see if the issue still persists on a clean-flashed system.
Thanks!
0x02448020(PADCTL_G7_SOC_GPIO57_0) is the pinmux register which is configured through pinmux dtsi loaded in MB1. It is not relating to how you configure in device tree for kernel.
HI,
In response to your above answer, I have two questions:
After jp6.0, is it impossible to modify pinmux directly in the kernel?
If the function of pin pin needs to be changed, can the reuse of PIN PIN pin only be changed by replacing the corresponding Pinmux.DTSI, gpio.dtsi and directly accessing the pinmux register?
If you are using the devkit, you can use Jetson-IO tool to enable some functions which is to configure the pinmux register. But if you want to control the pin(use it as GPIO output), you have to reflash the board to apply the change.
Yes, you can modify those dtsi manually if you are familiar with them.
If not, we would suggest using pinmux spreadsheet.