I am looking at the below carrier board spec and found that on the top level view there are alternate functionalities written which I believe are not default. In the “Expansion Header Pin Description” the primary functionality and secondary functionalities are provided but on the top view only primary were provided. For e.g pins like 7 and 8 are having GPIO as the primary in the pin description, but in the top level only MCLK05 and UART1_TX are provided. is GPIO default or the other functionalities MCLK05 and UART1_TX are default. Can somebody please clarify?
there’re CVM connector, ball name, and GPIOs.
actually, you may also check pinmux spreadsheets and check software driver for its ball name and GPIO,
for example,
UART1_TX, please check… UART1_TX / GPIO3_PR.02.
MCLK05, you should check… SOC_GPIO33 / GPIO3_PQ.06
Thanks for your reply. As you suggested, I checked the spreadsheet for the GPIO pin 8 (UART1_TX) and found the below information. CVM connector: UART1_TX Verilog Ball name: UART1_TX Package ball name: GP70_UART1_TXD_BOOT2_STRAP Customer usage: UA3_TXD Customer Usage Description or Net Names: 40-pin header Pin 8 GPIO/UART1_TXD Devkit usage: UART1_TXD
From this information can I confirm that the default operation of this pin is UART1_TX?
Also, pin 13 information is as below CVM connector: PWM01 Verilog Ball name: SOC_GPIO37 Package ball name: GP68 Customer usage: GP_PWM8 Customer Usage Description or Net Names: 40-pin header Pin 13 GPIO/PWM Devkit usage: PWM1_40PIN
This pin I tried to access as GPIO, I wired 13 and 16 pins on the 40 pin header and sent a digital 1 from pin 13 to pin 16, it was successful. In this case pin 13 worked as a GPIO.
The confusing thing still is that what is the default operation of these pins. In this spread sheet it is shown as alternate functionality as default but in general they can be used as GPIO. The data is somehow unclear or I may be misunderstanding. Kindly help me in this case.
the Devkit usage shows the default settings, you may see-also below for pin config settings per pin group.
for example, # cat /sys/kernel/debug/pinctrl/2430000.pinmux/pinconf-groups