Jetson AGX Xavier 4 CSI RAW Input From FPGA

The 12V is controlled by GPIO05, you need to pull it low to enable 12V.

Do I need to modify kernel? Or is there any physical pin to pull it down?

Yes, you need to modify in kernel.

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Hi there! Unfortunately we had to take a step back. We are currently trying to implement MIPI CSI-2.

Does these outputs valid?

Data Lane:

Clock Lane:

Did you revert the clock and data.
Data lane should be like second one.

Yeah, my bad. It should be reverse.

Hi there!

I’m trying to use TC358743 HDMI-to-CSI2 adapter board for testing purposes. Right now, I’m modifying device tree accordingly. But It needs a GPIO pin from the camera connector and I will connect It to GPIO15 of the connector. The problem is I don’t know how to set the “reset-gpios” node. What is the device tree node of GPIO15?

Regards.

Suppose it could be below pin.

#define CAM1_PWDN	TEGRA194_MAIN_GPIO(T, 5)