Jetson AGX Xavier SYS_VIN_HV and SYS_VIN_MV Power up sequence

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Xavier
1

Hi,

I have seen the Jetson AGX Xavier development board power sequence, In Dev kit they are using One Power Enable signal to enable powers(12V and 5V) to the module Simultaneously.

In my case I am not generating any Enable signal to release Module Powers(12V and 5V). Iam generating 5V from 12V with the SS delay of 6.4ms.

  • What will be the max delay acceptable between 12V and 5V power enables, can able to manage the delay through the Regulator (Soft Start Delay) option

Please provide your valuable suggestion.

3

A couple of ms should be OK. But even the timing is not so strict, still suggest to follow reference to use one EN for HV and MV, as the kind of your design is not validated.

5

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