Jetson GPIO circuitry/schematic

Hello,

I am in the process of designing a custom carrier board for the TX2 and have been testing the GPIOs to make sure they perform as expected for my application, but I am seeing some unexpected results. In short, it would be really helpful to understand the circuitry for the different GPIOs. I have been considering editing the pinmux docs to achieve what I want (pull ups, pull downs, etc) but I have a few questions before I do:

  1. What is the difference between the POR pin state and the initial pin direction and state? I would assume the the POR state is the state before the device tree has been initialized and then the initial state is after the os and device tree have come up? Is that along the right lines? Has anyone characterized the duration or each of these phases?

  2. When looking at the pinmux excel sheet some pins are blacked out which is clear that they are reserved but others are just labelled something specific, like SPI1_MISO. Can these pins be used for GPIO or are they used for the purpose that they are labeled after. Similarly, How do I know which options apply to which GPIO pins? I am referring to pulling up vs down, and 1.8V vs 3.3V, etc.

  3. Does anyone have the GPIO pin circuitry schematic.

Thanks!

Hi, regarding pinmux sheet, customer only need to fill the part of " Filled in by Customers", do you meet any issues related to pinmux? Better to discuss case by case.

For GPIO, you can refer to Figure 27: MPIO Pad Diagram with Pinmuxing Structure of TRM.

Figure 27 in which document?

TRM https://developer.nvidia.com/embedded/dlc/parker-series-trm