Jetson nano pin mux as a GPIO

Hi Team,

I want to configure below pins as a GPIO. Please let me know How can i mux it ?

CAM0 MCLK 116
CAM1_PWDN 120
CAM1 MCLK 122
SPI0_CS0 96
SPI1_CS0 110

And How can get its GPIO no?

regards,
Babbelal

hello babbelal.patel1,

there’re some pin with “Alternate Function”, please see chapter-3.3 [GPIO Pins] from Jetson Nano Module Data Sheet. many other pins are capable of being configured as GPIOs.

you should also access pinmux spreadsheets to review its default pin configuration, please update the [Customer usage] fields to have pin customization.

for the GPIO numbers, please also refer to pinmux spreadsheets for the port index and offsets, you should see tegra-gpio.h for the calculation formula.
let’s taking GPIO11 as an example, it’s GPIO3_PQ.06.
you should consider the GPIO3_P as the GPIO index, and the index behind as GPIO port, the following number as offset,
hence,

#define TEGRA_GPIO_PORT_Q 16
...
#define TEGRA_GPIO(port, offset) \
  	((TEGRA_GPIO_PORT_##port * 8) + offset)

the GPIO number of GPIO3_PQ.06 = (16 * 8) + 6 = 134.

Hi , I am new here so Can you provide detail about nano-jetson b01 pinmux spreadsheets?

hello babbelal.patel1,

please elaborate your question, may I know what’s the details you’re asking for?
here’s developer guide for your reference, Jetson Nano Adaptation and Bring-Up.
thanks

Hi Team,

I am using nano jetson b01 module. I want to mux below Pins as a GPIO.

How can mux its pin?
What will be dts file for that?
How can enable and what will be changes for that?

Please explain in detail.

CAM0 MCLK
CAM1_PWDN
CAM1 MCLK
SPI0_CS0
SPI1_CS0

hello babbelal.patel1,

please see below.
CAM0_MCLK, it’s Camera 0 Reference Clock, used by first Camera Connector.
CAM1_MCLK, it’s Camera 1 Reference Clock, used by second Camera Connector.
CAM1_PWDN, it’s Camera 1 Powerdown for second Camera Connector. however, you may configure this as GPIO.
SPI0_CS0, SPI1_CS0, these two were by default configured as GPIO.

OK if you are saying SPI0_CS0 and SPI1_CS0 pins default as GPIO then What will be its GPIO no ?

And let me know, How we can configure these three pins CAM0 MCLK, CAM1_PWDN & CAM1 MCLK as a GPIO ?

you may calculate the GPIO numbers. please see post #3 for reference.

Thanks, Another pins are working now. Please see below.

Issue1:
I have convert CAM1_PWDN pin as a GPIO =>GPIO3_PT.00 = 19*8+0= 152
I am getting error when export 152 GPIO no.

Issue2:
I have convert SPI1_CS0 pin as a GPIO =>GPIO3_PB.07=1*8+7=15
I am unable to configure direction out pins.

cimcon@cimcon:~$ echo 152 > /sys/class/gpio/export
-bash: echo: write error: Device or resource busy
cimcon@cimcon:~$
cimcon@cimcon:~$
cimcon@cimcon:~$
cimcon@cimcon:~$ echo 15 > /sys/class/gpio/export
cimcon@cimcon:~$ echo out > /sys/class/gpio/gpio15/direction
-bash: echo: write error: Input/output error
cimcon@cimcon:~$

this means this pin has occupied, please review the device tree settings for the configuration.

could you please add below into your device tree for confirmation.
for example,

			spi1_cs1_pc4 {
				nvidia,pins = "spi1_cs1_pc4";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

Can you update me what I will have to do for Issue1 and Issue2 in details?

I am using /boot/tegra210-p3448-0000-p3449-0000-b00.dtb file

hello babbelal.patel1,


you’ll need to check developer guide, pinmux changes.
please change the pinmux configuration applied by the software, you should update DTB partition for Nano series reading the configuration.

Hi,

I have add below in dts file and update dtb after build.

spi1_cs0_pc3 {
nvidia,pins = “spi1_cs0_pc3”;
nvidia,function = “spi1”;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
spi1_cs1_pc4 {
nvidia,pins = “spi1_cs1_pc4”;
nvidia,function = “rsvd1”;
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
cam1_pwdn_ps7 {
nvidia,pins = “cam1_pwdn_ps7”;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};

Now I am getting same issue.
cimcon@cimcon:/boot$ echo 152 > /sys/class/gpio/export
-bash: echo: write error: Device or resource busy
cimcon@cimcon:/boot$
cimcon@cimcon:/boot$
cimcon@cimcon:/boot$ echo out > /sys/class/gpio/gpio15/direction
-bash: echo: write error: Input/output error
cimcon@cimcon:/boot$tegra210-p3448-0000-p3449-0000-b00.dts (4.1 KB)

I am updating below path.

dmesg |grep dts
[ 0.212198] DTS File Name: …/arch/arm64/boot/dts/…/…/…/…/…/…/hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-p3448-0000-p3449-0000-b00.dts

Please update me. How can do it ?

hello babbelal.patel1,

after you build the *.dtb file, please copy the binary file to the target, you should modify the /boot/extlinux/extlinux.conf to add FDT entry to specify the path. perform warm-reboot, $ sudo reboot to have change applied.

Hi ,
Please see my full steps.

1)-Check dts file: dmesg |grep dts
[ 0.211868] DTS File Name: …/arch/arm64/boot/dts/…/…/…/…/…/…/hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-p3448-0000-p3449-0000-b00.dts

2)-Update dts file now.
tegra210-p3448-0000-p3449-0000-b00.dts (4.1 KB)

3)-Build dts file
JETSON_NANO_KERNEL_SOURCE=$(pwd)
TEGRA_KERNEL_OUT=$JETSON_NANO_KERNEL_SOURCE/build
KERNEL_MODULES_OUT=$JETSON_NANO_KERNEL_SOURCE/modules
TOOLCHAIN_PREFIX=/home/cimcon/2-Nano-jetson/Jetson-tool-chain/gcc-linaro-7.3.1-2018.05-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-
make -C . ARCH=arm64 O=$TEGRA_KERNEL_OUT LOCALVERSION=-tegra CROSS_COMPILE=${TOOLCHAIN_PREFIX} tegra_defconfig
make -C . ARCH=arm64 O=$TEGRA_KERNEL_OUT LOCALVERSION=-tegra CROSS_COMPILE=${TOOLCHAIN_PREFIX} -j8 --output-sync=target zImage
make -C . ARCH=arm64 O=$TEGRA_KERNEL_OUT LOCALVERSION=-tegra CROSS_COMPILE=${TOOLCHAIN_PREFIX} -j8 --output-sync=target modules
make -C . ARCH=arm64 O=$TEGRA_KERNEL_OUT LOCALVERSION=-tegra CROSS_COMPILE=${TOOLCHAIN_PREFIX} -j8 --output-sync=target dtbs

4-load its on target board.
sudo scp -r build/arch/arm64/boot/dts/ cimcon@199.199.50.191:/home/cimcon
sudo mv *.dtbo /boot
sudo mv *.dtb /boot

5-Add dtb file in extlinux.conf
cimcon@cimcon:~$ cat /boot/extlinux/extlinux.conf
TIMEOUT 30
DEFAULT primary

MENU TITLE L4T boot options

LABEL primary
MENU LABEL primary kernel
LINUX /boot/Image
INITRD /boot/initrd
FDT /boot/tegra210-p3448-0000-p3449-0000-b00.dtb
APPEND ${cbootargs} quiet root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4 console=ttyS0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0

When testing a custom kernel, it is recommended that you create a backup of

the original kernel and add a new entry to this file so that the device can

fallback to the original kernel. To do this:

1, Make a backup of the original kernel

sudo cp /boot/Image /boot/Image.backup

2, Copy your custom kernel into /boot/Image

3, Uncomment below menu setting lines for the original kernel

4, Reboot

LABEL backup

MENU LABEL backup kernel

LINUX /boot/Image.backup

INITRD /boot/initrd

APPEND ${cbootargs}

  1. reboot the device.

  2. After reboot i have check.
    cimcon@cimcon:/boot$ echo 152 > /sys/class/gpio/export
    -bash: echo: write error: Device or resource busy

cimcon@cimcon:~$ echo 15 > /sys/class/gpio/export
cimcon@cimcon:~$ echo out > /sys/class/gpio/gpio15/direction
-bash: echo: write error: Input/output error

Please check my all steps and let me know if any points are missing

hello babbelal.patel1,

you’ve already have definition, no need to export the pin via sys nodes for the usage.
you may use that in kernel layer to control these pins.

	cam1_pwdn_ps7 {
				nvidia,pins = "cam1_pwdn_ps7";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
		};

note,
there’re some camera device trees to use this pin as reset-gpio, please check you’ve already exclude those device trees.
for example,

#define CAM1_PWDN		TEGRA_GPIO(S, 7)
...
				reset-gpios = <&gpio CAM1_PWDN GPIO_ACTIVE_HIGH>;

according to device tree configuration. this pin has already configured as output.

	spi1_cs1_pc4 {
				nvidia,pins = "spi1_cs1_pc4";
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;

Hi Team,

I am unable to export GPIO2 pin no 124. Please let me know some solution.

GPIO02 ==>GPIO3_PH.06 ===> 18*7+6 ===> 132
cimcon@cimcon:~$ sudo echo 132 > /sys/class/gpio/export
echo: write error: Invalid argument

regards,
Babbelal

hello babbelal.patel1,

it’s by default defined in the device tree,
for example,

        gpio: gpio@6000d000 {
                gpio-init-names = "default";
                gpio-init-0 = <&gpio_default>;

                gpio_default: default {
                        gpio-input = <
                                TEGRA_GPIO(H, 6)

could you please refer to comment #18 to control the pin from kernel driver side.

In which dts file, We need to change it for jetson-nano b01.

Have you any Linux commands to check device tree in running board?

regards,
Babbelal