Jetson Nano PinMux Adaptation Unclear

Hello all,

For the last few days I have been trying to figure out how to I can access all of the GPIO that I have used in my custom carrier design. Since accessing e.g. GPIO06 (in the reference schematic, board pin number 64 or pin 130 on the DDR4 socket) gives the error: echo: write error: Device or resource busy, I figure that I have to do some pinmux adaptations.
Using the latest version of the Pinmux spreadsheet, I have managed to generate two .dtsi files for my configuration. But then the documentation, found at: https://docs.nvidia.com/jetson/archives/l4t-archived/l4t-3242/Tegra%20Linux%20Driver%20Package%20Development%20Guide/adaptation_and_bringup_nano.html#, gets blurry.

I have a copy of the L4T and sample root filesystem on my host system that I have untar’ed according to the instructions and have been able to flash a Jetson Nano from my host machine. But I can not seem to find the U-boot source code path or how to get that. Is there a more detailed introductory tutorial on how to get this working?

Besides a pinmux I guess I could also do some optimizations that ditch some peripherals and GUI interfaces (since my carrier board is a headless device). Those optimizations are however just nice to have, the access to the GPIO is more critical to my application since these control some logic lines of other ICs on the carrier board.

Best regards

hello Mijnendatum,

you should refer to developer guide for Platform Adaptation and Bring-Up chapter, please check Pinmux changes session to customize the pinmux spreadsheet.
Or, you may also refer to Configuring the 40-Pin Expansion Header, by using Jetson‑IO python tool to configure GPIOs.
thanks

After digging deeper into the documentation I was able to get the L4T sources and followed the steps in the Platform Adaptation Guide. After building the kernel, moving the image and .dtb files to the L4T directory, I flashed the nano once again but still to no avail.

When I try to do echo 64 > /sys/class/gpio/export the same error message is returned: echo: write error: Device or resource busy. I do not understand why this occurs while I have set, or at least I believe to have set, my configuration as the default by following the instructions of Porting U-Boot from the guide.

According to the Pinmux spreadsheet, pin 64 or GPIO3_PI.00 is dubbed NFC_EN and nfc_en_pi0 while there is no NFC present on the Jetson Nano devkits. Is this some legacy from the TX1 boards and a service that occupies this pin?

hello Mijnendatum,

according to Nano Pinmux, GPIO06 on the devkit were used for M.2 Key E.

Yes, that is true. I just looked at the reference schematics, instead of my own and I found that GPIO06, pin 64 or GPIO3_PI.00 is in fact the MUX select for the CSI interfaces on the Jetson Nano Developer Kit boards. I guess that is way this pin could never be simply accessed. It is strange that this is not reflected in the pinmux spreadsheet.

Since my custom carrier only features one CSI interface, I ditched the I2C MUX used for the camera selection. Is there a way to release this pin from its usage as the camera mux select and have it as a standard GPIO?

hello Mijnendatum,

you may have device tree changes to update the pin as gpio by default.
BTW,
you may disassembler the dtb file into text file for checking,
i.e. $ dtc -I dtb -O dts -o results.txt tegra210-p3448-0002-p3449-0000-b00.dtb

you may check below for your device tree configurations for GPIO pins,
for example,

        gpio@6000d000 {
...
                default {
                        gpio-input = <0xd8 0xc 0xd 0xe 0xf 0xe8 0x26 0x95 0x5 0xbc 0xbd 0xbe 0xc1 0xc2 0xa8 0xa9 0xc8 0xca 0x4d 0x4e 0x4c 0x4f 0x32 0x33 0x10 0x11 0x12 0x13 0x14 0x3a 0x3d 0x3e 0xe4>;
                        gpio-output-low = <0x97 0x98 0x38 0x3b 0x3c 0x3f 0x40 0x42>;