For the last few days I have been trying to figure out how to I can access all of the GPIO that I have used in my custom carrier design. Since accessing e.g. GPIO06 (in the reference schematic, board pin number 64 or pin 130 on the DDR4 socket) gives the error:
echo: write error: Device or resource busy, I figure that I have to do some pinmux adaptations.
Using the latest version of the Pinmux spreadsheet, I have managed to generate two .dtsi files for my configuration. But then the documentation, found at: https://docs.nvidia.com/jetson/archives/l4t-archived/l4t-3242/Tegra%20Linux%20Driver%20Package%20Development%20Guide/adaptation_and_bringup_nano.html#, gets blurry.
I have a copy of the L4T and sample root filesystem on my host system that I have untar’ed according to the instructions and have been able to flash a Jetson Nano from my host machine. But I can not seem to find the U-boot source code path or how to get that. Is there a more detailed introductory tutorial on how to get this working?
Besides a pinmux I guess I could also do some optimizations that ditch some peripherals and GUI interfaces (since my carrier board is a headless device). Those optimizations are however just nice to have, the access to the GPIO is more critical to my application since these control some logic lines of other ICs on the carrier board.