I am using JetPack4.6 to do Nano spi1(succeed) and spi2（failed） loop test. I know I should modify the SPI1 and SPI2 in the dtsi[nvidia, function； nvidia,pull; nvidia,tristate ; nvidia,enable-input ]。 But why is reading register data spi1 correct and SPI2 incorrect? (I did not modify the device tree of SPI1, but the registers read were correct, which is quite strange)
wyf@wyf-desktop:~$ sudo cat /sys/kernel/debug/tegra_pinctrl_reg |grep 'spi'
[sudo] password for wyf:
Bank: 1 Reg: 0x70003050 Val: 0x0000e044 -> spi1_mosi_pc0
Bank: 1 Reg: 0x70003054 Val: 0x0000e044 -> spi1_miso_pc1
Bank: 1 Reg: 0x70003058 Val: 0x0000e044 -> spi1_sck_pc2
Bank: 1 Reg: 0x7000305c Val: 0x0000e048 -> spi1_cs0_pc3
Bank: 1 Reg: 0x70003060 Val: 0x0000e048 -> spi1_cs1_pc4
Bank: 1 Reg: 0x70003064 Val: 0x00006016 -> spi2_mosi_pb4
Bank: 1 Reg: 0x70003068 Val: 0x00006016 -> spi2_miso_pb5
Bank: 1 Reg: 0x7000306c Val: 0x00006016 -> spi2_sck_pb6
Bank: 1 Reg: 0x70003070 Val: 0x00006016 -> spi2_cs0_pb7
Bank: 1 Reg: 0x70003074 Val: 0x00006015 -> spi2_cs1_pdd0
Bank: 1 Reg: 0x70003078 Val: 0x0000e015 -> spi4_mosi_pc7
Bank: 1 Reg: 0x7000307c Val: 0x0000e015 -> spi4_miso_pd0
Bank: 1 Reg: 0x70003080 Val: 0x0000e015 -> spi4_sck_pc5
Bank: 1 Reg: 0x70003084 Val: 0x0000e015 -> spi4_cs0_pc6
Bank: 1 Reg: 0x70003088 Val: 0x00002015 -> qspi_sck_pee0
Bank: 1 Reg: 0x7000308c Val: 0x00002015 -> qspi_cs_n_pee1
Bank: 1 Reg: 0x70003090 Val: 0x00002015 -> qspi_io0_pee2
Bank: 1 Reg: 0x70003094 Val: 0x00002015 -> qspi_io1_pee3
Bank: 1 Reg: 0x70003098 Val: 0x00002015 -> qspi_io2_pee4
Bank: 1 Reg: 0x7000309c Val: 0x00002015 -> qspi_io3_pee5
Bank: 0 Reg: 0x70000b70 Val: 0x00000001 -> drive_qspi_comp_control
Bank: 0 Reg: 0x70000b78 Val: 0x00000001 -> drive_qspi_lpbk_control
Bank: 0 Reg: 0x70000a78 Val: 0x00808000 -> drive_qspi_comp
this is my tegra210-porg-pinmux-p3448-0002-b00.dtsi
spi1_miso_pc1 {
nvidia,pins = "spi1_miso_pc1";
nvidia,function = "rsvd1"; //but The correct should be “spi1”
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>; //<disbale>
nvidia,enable-input = <TEGRA_PIN_DISABLE>; //enable
};
spi1_sck_pc2 {
nvidia,pins = "spi1_sck_pc2";
nvidia,function = "rsvd1"; //spi1
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
spi1_cs0_pc3 {
nvidia,pins = "spi1_cs0_pc3";
nvidia,function = "rsvd1"; //spi1
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
spi1_cs1_pc4 {
nvidia,pins = "spi1_cs1_pc4";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
spi4_mosi_pc7 {
nvidia,pins = "spi4_mosi_pc7";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
this is my tegra210-porg-gpio-p3448-0002-b00.dtsi
#include <dt-bindings/gpio/tegra-gpio.h>
/ {
gpio: gpio@6000d000 {
gpio-init-names = "default";
gpio-init-0 = <&gpio_default>;
gpio_default: default {
gpio-input = <
TEGRA_GPIO(A, 5)
TEGRA_GPIO(X, 4)
TEGRA_GPIO(X, 5)
TEGRA_GPIO(X, 6)
TEGRA_GPIO(Y, 1)
TEGRA_GPIO(V, 1)
TEGRA_GPIO(Z, 2)
TEGRA_GPIO(H, 2)
TEGRA_GPIO(H, 5)
TEGRA_GPIO(H, 6)
TEGRA_GPIO(I, 1)
TEGRA_GPIO(CC, 4)
>;
gpio-output-low = <
TEGRA_GPIO(S, 7)
TEGRA_GPIO(T, 0)
TEGRA_GPIO(Z, 3)
TEGRA_GPIO(H, 0)
TEGRA_GPIO(H, 3)
TEGRA_GPIO(H, 4)
TEGRA_GPIO(H, 7)
TEGRA_GPIO(I, 0)
TEGRA_GPIO(I, 2)
>;
gpio-output-high = <
TEGRA_GPIO(A, 6)
TEGRA_GPIO(X, 3)
TEGRA_GPIO(CC, 7)
>;
};
};
};