Hello,
I have problem with setup dual can bus on Jetson NX via SPI using MCP2515.
This is my coerce of actions:
- Build MCP251x kernel module
- Install new module in Jetson
- Create custom dts file:
/*
* Top level DTS file for CVM:P3668-0001 and CVB:P3509-0000.
*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
/dts-v1/;
#include "common/tegra194-p3668-common.dtsi"
#include "common/tegra194-p3509-0000-a00.dtsi"
#include <dt-common/jetson/tegra194-p3668-all-p3509-0000.h>
#include <dt-bindings/gpio/tegra194-gpio.h>
#include <dt-bindings/input/input.h>
/ {
nvidia,dtsfilename = __FILE__;
nvidia,dtbbuildtime = __DATE__, __TIME__;
compatible = "nvidia,p3449-0000+p3668-0000", "nvidia,p3449-0000+p3668-0001", "nvidia,p3509-0000+p3668-0000", "nvidia,p3509-0000+p3668-0001", "nvidia,tegra194";
pinmux@2430000 {
pinctrl-0 = <0x179>;
pinctrl-names = "default";
compatible = "nvidia,tegra194-pinmux";
reg = <0x0 0x2430000 0x0 0x17000 0x0 0xc300000 0x0 0x4000>;
#gpio-range-cells = <0x2>;
status = "okay";
linux,phandle = <0xab>;
phandle = <0xab>;
header-40pin-pinmux {
phandle = <0x179>;
linux,phandle = <0x179>;
pin37 {
nvidia,lpdr = <0x0>;
nvidia,io-high-voltage = <0x0>;
nvidia,enable-input = <0x1>;
nvidia,tristate = <0x0>;
nvidia,pull = <0x1>;
nvidia,pins = "spi3_mosi_py2";
nvidia,function = "spi3";
};
pin28 {
nvidia,lpdr = <0x1>;
nvidia,io-high-voltage = <0x1>;
nvidia,enable-input = <0x1>;
nvidia,tristate = <0x0>;
nvidia,pull = <0x0>;
nvidia,pins = "gen2_i2c_scl_pcc7";
nvidia,function = "i2c2";
};
pin27 {
nvidia,lpdr = <0x1>;
nvidia,io-high-voltage = <0x1>;
nvidia,enable-input = <0x1>;
nvidia,tristate = <0x0>;
nvidia,pull = <0x0>;
nvidia,pins = "gen2_i2c_sda_pdd0";
nvidia,function = "i2c2";
};
/*
pin26 {
nvidia,lpdr = <0x0>;
nvidia,enable-input = <0x1>;
nvidia,tristate = <0x0>;
nvidia,pull = <0x2>;
nvidia,pins = "spi1_cs1_pz7";
nvidia,function = "spi1";
};
*/
pin24 {
nvidia,lpdr = <0x0>;
nvidia,enable-input = <0x1>;
nvidia,tristate = <0x0>;
nvidia,pull = <0x2>;
nvidia,pins = "spi1_cs0_pz6";
nvidia,function = "spi1";
};
pin23 {
nvidia,lpdr = <0x0>;
nvidia,enable-input = <0x1>;
nvidia,tristate = <0x0>;
nvidia,pull = <0x1>;
nvidia,pins = "spi1_sck_pz3";
nvidia,function = "spi1";
};
pin22 {
nvidia,lpdr = <0x0>;
nvidia,io-high-voltage = <0x0>;
nvidia,enable-input = <0x1>;
nvidia,tristate = <0x0>;
nvidia,pull = <0x1>;
nvidia,pins = "spi3_miso_py1";
nvidia,function = "spi3";
};
pin21 {
nvidia,lpdr = <0x0>;
nvidia,enable-input = <0x1>;
nvidia,tristate = <0x0>;
nvidia,pull = <0x1>;
nvidia,pins = "spi1_miso_pz4";
nvidia,function = "spi1";
};
pin19 {
nvidia,lpdr = <0x0>;
nvidia,enable-input = <0x1>;
nvidia,tristate = <0x0>;
nvidia,pull = <0x1>;
nvidia,pins = "spi1_mosi_pz5";
nvidia,function = "spi1";
};
pin18 {
nvidia,lpdr = <0x0>;
nvidia,io-high-voltage = <0x0>;
nvidia,enable-input = <0x1>;
nvidia,tristate = <0x0>;
nvidia,pull = <0x2>;
nvidia,pins = "spi3_cs0_py3";
nvidia,function = "spi3";
};
/*
pin16 {
nvidia,lpdr = <0x0>;
nvidia,io-high-voltage = <0x0>;
nvidia,enable-input = <0x1>;
nvidia,tristate = <0x0>;
nvidia,pull = <0x2>;
nvidia,pins = "spi3_cs1_py4";
nvidia,function = "spi3";
};
*/
pin13 {
nvidia,lpdr = <0x0>;
nvidia,io-high-voltage = <0x0>;
nvidia,enable-input = <0x1>;
nvidia,tristate = <0x0>;
nvidia,pull = <0x1>;
nvidia,pins = "spi3_sck_py0";
nvidia,function = "spi3";
};
pin10 {
nvidia,lpdr = <0x0>;
nvidia,io-high-voltage = <0x0>;
nvidia,enable-input = <0x1>;
nvidia,tristate = <0x1>;
nvidia,pull = <0x2>;
nvidia,pins = "uart1_rx_pr3";
nvidia,function = "uarta";
};
pin8 {
nvidia,lpdr = <0x0>;
nvidia,io-high-voltage = <0x0>;
nvidia,enable-input = <0x0>;
nvidia,tristate = <0x0>;
nvidia,pull = <0x0>;
nvidia,pins = "uart1_tx_pr2";
nvidia,function = "uarta";
};
};
};
spi@3210000 {
can0: spi@0 {
status = "okay";
compatible = "microchip,mcp2515";
reg = <0x0>;
spi-max-frequency = <10000000>;
nvidia,enable-hw-based-cs;
clocks = <&can_clock>;
interrupt-parrent=<&tegra_main_gpio>;
interrupts = <TEGRA194_MAIN_GPIO(Z, 7) IRQ_TYPE_EDGE_FALLING>; // GPIO pin chosen from 40 pin header - SPI0_CS1
};
};
spi@3230000 { /* SPI 1 at 40 pin header */
can1: spi@0 {
status = "okay";
compatible = "microchip,mcp2515";
reg = <0x0>;
spi-max-frequency = <10000000>;
nvidia,enable-hw-based-cs;
clocks = <&can_clock>;
interrupt-parrent=<&tegra_main_gpio>;
interrupts = <TEGRA194_MAIN_GPIO(Y, 4) IRQ_TYPE_EDGE_FALLING>; // GPIO pin chosen from 40 pin header - SPI1_CS1
};
};
clocks {
can_clock: can_clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <8000000>;
clock-accuracy = <100>;
};
};
};
- Build dtbs and upload to Jetson /boot directory
- Add dtb file to startup
- Connect mcp2515 to spi0 or spi1 on 40-pin gpio and INT pin to CS1 of the same spi bus
- Reboot
And after make can up:
sudo ip link set can0 up type can biterate 125000
I have error:
RTNETLINK answers: Invalid argument
And in dmesg, I have:
mcp251x spi0.0 failed to acquire irq 0
I didn’t found in /proc/interrupts file, information about mcp251x interrupt.