# Jetson Orin AGX Development Board Driving GPIO HIGH using Linux CLI

**URL:** <https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433>\
**Category:** Jetson AGX Orin\
**Tags:** gpio\
**Created:** [June 15, 2026, 10:55pm UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433 "2026-06-15T22:55:44Z")\
**Posts on this page:** 13\
**Page:** 1

<div class="post-metadata">

**Author:** ![luquilanzi](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@luquilanzi](https://forums.developer.nvidia.com/u/luquilanzi)\
**Post date:** [June 15, 2026, 10:55pm UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433/1 "2026-06-15T22:55:45Z")

</div>

Hello,

I’m using an NVIDIA Jetson AGX Orin 64GB Developer Kit and I’m trying to drive one of the pins on the 40-pin GPIO header HIGH from the Linux command line.

I have not been able to find clear documentation or a working example that shows how to do this on AGX Orin.

What I’m looking for:

- how to identify the correct GPIO corresponding to a physical 40-pin header pin

- how to configure that pin as an output

- how to set it HIGH from the Linux command line

- whether the recommended method is via libgpiod, gpioset/gpioget, sysfs, or another interface

- any JetPack / L4T specific steps or limitations

My setup:

- Device: Jetson AGX Orin 64GB Developer Kit

- Goal: drive a selected 40-pin header GPIO pin HIGH from Linux CLI

If helpful, I can provide:

- JetPack / L4T version

- exact physical pin number on the 40-pin header

- current pinmux or device-tree configuration

Thank you.

---

<div class="post-metadata">

**Author:** ![MarkusHoHo](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/markushoho/32/233145_2.png) [@MarkusHoHo](https://forums.developer.nvidia.com/u/MarkusHoHo)\
**Post date:** [June 16, 2026, 12:01am UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433/2 "2026-06-16T00:01:55Z")

</div>

Hello @luquilanzi!

Based on the title and content of your topic, it looks like it may receive better visibility and feedback in a different category. We took the liberty of moving it for you.

If this was an incorrect assessment, please send me a direct message.

_Disclaimer: this moderation suggestion and message were generated with AI assistance._

---

<div class="post-metadata">

**Author:** ![carolyuu](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/carolyuu/32/14043_2.png) [@carolyuu](https://forums.developer.nvidia.com/u/carolyuu)\
**Post date:** [June 16, 2026, 12:20am UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433/3 "2026-06-16T00:20:24Z")

</div>

— 🤖 This is an automated AI response. I’m here to help, but please verify important details! —

To drive a selected 40-pin header GPIO pin HIGH from Linux CLI on the Jetson AGX Orin 64GB Developer Kit, follow these steps:

1. **Identify the correct GPIO corresponding to a physical 40-pin header pin** : You can find the pin mapping for the 40-pin header in the `Jetson AGX Orin Developer Kit Carrier Board Specification` document. For example, PIN15 of J30 is `PN.01`.
2. **Configure the pin as an output** : You can configure the pinmux using the `pinmux spreadsheet` or by applying a patch to the kernel source. For JP6.x, you may need to apply the patch from the following thread: [40hdr - SPI1 gpio padctl register bit[10] effect by gpiod tools in JP6 - #20 by KevinFFF](https://forums.developer.nvidia.com/t/40hdr-spi1-gpio-padctl-register-bit-10-effect-by-gpiod-tools-in-jp6/301171/20).
3. **Set the pin HIGH from the Linux command line** : You can use the `gpioset` command to set the pin HIGH. For example:

```auto
$ sudo gpioset --mode=wait `gpiofind "PN.01"`=1

```

```
This command sets the `PN.01` pin HIGH.

```

**Recommended method** : The recommended method is via `libgpiod`, which provides a more modern and flexible way of interacting with GPIOs. You can use the `gpioset` and `gpioget` commands to set and get the state of GPIO pins.

**JetPack / L4T specific steps or limitations** : Make sure to check the `JetPack` and `L4T` version compatibility. For JP6.x, you may need to apply the patch mentioned earlier.

**Additional information** : You can also use the `sysfs` interface to interact with GPIOs, but it is deprecated and not recommended.

Please note that the provided context does not cover the exact physical pin number on the 40-pin header or the current pinmux or device-tree configuration. If you provide this information, I can give more specific guidance.

— We support team will also look into your issue to have further suggestions soon. please stay tuned. —

---

<div class="post-metadata">

**Author:** ![DaneLLL](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/danelll/32/14043_2.png) [@DaneLLL](https://forums.developer.nvidia.com/u/DaneLLL)\
**Post date:** [June 16, 2026, 2:39am UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433/6 "2026-06-16T02:39:07Z")

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Hi,  
Please check the guidance and real practice in  
[Making sure you're not a bot!](https://elinux.org/Jetson/L4T/peripheral/#GPIO)  
[40hdr - SPI1 gpio padctl register bit[10] effect by gpiod tools in JP6](https://forums.developer.nvidia.com/t/301171)

If you don’t use Jetpack 6.2.2 r36.5 or 7.2 r39.2, you must apply the patch:  
[40hdr - SPI1 gpio padctl register bit[10] effect by gpiod tools in JP6 - #20 by KevinFFF](https://forums.developer.nvidia.com/t/301171/20)

---

<div class="post-metadata">

**Author:** ![luquilanzi](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@luquilanzi](https://forums.developer.nvidia.com/u/luquilanzi)\
**Post date:** [June 16, 2026, 3:05am UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433/7 "2026-06-16T03:05:24Z")

</div>

> [@carolyuu](#):
>
> 1. Jetson AGX Orin Developer Kit Carrier Board Specification

Thank you! Will try this at work tomorrow.  
Appreciate it

---

<div class="post-metadata">

**Author:** ![luquilanzi](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@luquilanzi](https://forums.developer.nvidia.com/u/luquilanzi)\
**Post date:** [June 24, 2026, 8:53pm UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433/8 "2026-06-24T20:53:10Z")

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Hello!  
Opening this up again as I have gone ahead and tried using this pin, as it shows up as gpiochip0 line 85, which I can write to, however upon testing with a multimeter and an LED, the pin is not driven high at all.  
I updated my version of Jetpack to 6.2.2 r36.5 and I am unable to drive the GPIO high. Please help!

---

<div class="post-metadata">

**Author:** ![KevinFFF](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/kevinfff/32/15508_2.png) [@KevinFFF](https://forums.developer.nvidia.com/u/KevinFFF)\
**Post date:** [June 25, 2026, 8:43am UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433/9 "2026-06-25T08:43:02Z")

</div>

Hi luquilanzi,

What’s the Jetpack version in use?

```auto
gpiochip0 - 164 lines:
        ..
        line 85: "PN.01" unused input active-high

```

Do you want to control above GPIO?  
If so, please simply run the following command to verify.

```auto
# gpioset --mode=wait `gpiofind "PN.01"`=0
# gpioset --mode=wait `gpiofind "PN.01"`=1

```

Please confirm that you’ve configured its pinmux as `Output/Drive 0 or 1` before use.

 ![image](https://global.discourse-cdn.com/nvidia/original/4X/c/9/0/c901cb92bc6097d34160e1a85b3a98ef5c921b93.png)

---

<div class="post-metadata">

**Author:** ![luquilanzi](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@luquilanzi](https://forums.developer.nvidia.com/u/luquilanzi)\
**Post date:** [July 8, 2026, 6:35pm UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433/11 "2026-07-08T18:35:14Z")

</div>

Hello!  
My apologies for the delay,  
I still am not convinced I have been able to setup the GPIO I want properly.

Checking my version, I get:

```auto
jpl-jetson@ubuntu:~/fprime-scales-ref$ sudo apt show nvidia-jetpack
Package: nvidia-jetpack
Version: 6.2.2+b24
Priority: standard
Section: metapackages
Source: nvidia-jetpack (6.2.2)
Maintainer: NVIDIA Corporation
Installed-Size: 199 kB
Depends: nvidia-jetpack-runtime (= 6.2.2+b24), nvidia-jetpack-dev (= 6.2.2+b24)
Homepage: http://developer.nvidia.com/jetson
Download-Size: 29.3 kB
APT-Manual-Installed: yes
APT-Sources: https://repo.download.nvidia.com/jetson/common r36.5/main arm64 Packages
Description: NVIDIA Jetpack Meta Package 

```

I would like to use GPIO27 - Pin 15 as shown here:

 ![image](https://global.discourse-cdn.com/nvidia/original/4X/1/e/d/1edb28d9f8027cd8d681b2b84ddc8e37fd345486.png)  
Currently my fprime implementation (Flight software) opens a GPIO using its built in OSAL gpiodriver that uses a watchdog component ive written, that pings the on board watchdog circuitry. As you can see below, the fprime implementation has accessed and opened the GPIO, however, I have an LED on the watchdog circuitry that should light up every time the GPIO is driven high. Despite the GPIO being rated for 24mA, and the LED having a forward current rating of 20mA the LED should be blinking on every pet/unpet cycle.  
Here is the terminal output when running

```auto
gpioinfo gpiochip0

```

 ![image](https://global.discourse-cdn.com/nvidia/original/4X/0/3/d/03dc9af9a9d070cdbecf7bc388991706a3ff7b1c.png)

Thanks!

---

<div class="post-metadata">

**Author:** ![KevinFFF](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/kevinfff/32/15508_2.png) [@KevinFFF](https://forums.developer.nvidia.com/u/KevinFFF)\
**Post date:** [July 9, 2026, 8:04am UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433/12 "2026-07-09T08:04:44Z")

</div>

> [@luquilanzi](#):
>
> I would like to use GPIO27 - Pin 15 as shown here:

It should be PN.01.  
Have you configured the pinmux of this pin as GPIO/Output before use?

Have you run the following commands to control it?

> [@KevinFFF](#):
>
> ```auto
> # gpioset --mode=wait `gpiofind "PN.01"`=0
> # gpioset --mode=wait `gpiofind "PN.01"`=1
> 
> ```

> [@luquilanzi](#):
>
> ![image](https://global.discourse-cdn.com/nvidia/original/4X/0/3/d/03dc9af9a9d070cdbecf7bc388991706a3ff7b1c.png)

It seems you have custom driver(jetson\_gpioWatchdogDriver) to control this pin.  
Please also get a scope to measure its voltage.

---

<div class="post-metadata">

**Author:** ![luquilanzi](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@luquilanzi](https://forums.developer.nvidia.com/u/luquilanzi)\
**Post date:** [July 9, 2026, 6:12pm UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433/13 "2026-07-09T18:12:47Z")

</div>

> [@KevinFFF](#):
>
> `gpioset --mode=wait `gpiofind "PN.01"`=0`

Hello!  
I have gone ahead and written a script with the following code:

```auto
#!/usr/bin/env bash

while true; do
    gpioset --mode=wait 'gpiofind "PN.01"'=1
    sleep 1
    gpioset --mode=wait 'gpiofind "PN.01"'=0
    sleep 1
done

```

Upon running I get the following response from the terminal

```auto
((fprime-venv) ) jpl-jetson@ubuntu:~/fprime-scales-ref$ ./bash_wd_test.sh 
gpioset: at least one GPIO line offset to value mapping must be specified
gpioset: at least one GPIO line offset to value mapping must be specified
gpioset: at least one GPIO line offset to value mapping must be specified
gpioset: at least one GPIO line offset to value mapping must be specified

```

Upon further investigation, if I utilize this [repo](https://github.com/NVIDIA/jetson-gpio) I can drive the GPIO on my board HIGH and LOW using pin 15. By running a small python script I can verify that using this library I can drive the pin high, as the LED I have wired directly to it lights up and turns off accordingly.

```auto
import Jetson.GPIO as GPIO
import time

wd_pin = 15

GPIO.setmode(GPIO.BOARD)
GPIO.setup(wd_pin, GPIO.OUT, initial=GPIO.LOW)

# 3.3v Square Wave, 1Hz, 50% Duty Cycle

try:
        while True:
                GPIO.output(wd_pin, GPIO.HIGH)
                time.sleep(0.5)
                GPIO.output(wd_pin, GPIO.LOW)
                time.sleep(0.5)
except KeyboardInterrupt:
        print("Exiting")
        GPIO.cleanup()

```

When you ask about pin muxing, this last step would not work if the pin was not alreayd preconfigured to be muxed, correct?

All I need to know is the gpiochip0 line offset for the pin, is there a way I can traceback the GPIO.BOARD mapping back to its gpiochip0 line offset, so that my Fprime OSAL can call it directly using C++? Having to integrate this in python just to get this functionality would require some refactoring of our components.  
Thank you!

---

<div class="post-metadata">

**Author:** ![luquilanzi](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@luquilanzi](https://forums.developer.nvidia.com/u/luquilanzi)\
**Post date:** [July 9, 2026, 10:04pm UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433/14 "2026-07-09T22:04:39Z")

</div>

After doing some more digging, I was able to run the python library to toggle the GPIO HIGH and then using ````gpioinfo gpiochip0````I was able to see which gpiochip0 line had changed from before I toggled the GPIO HIGH. I discovered the proper pinout for PIN 15 corresponds to gpiochip0 line 108. This is now working. I would like to know why all the recommendations on what to do were giving the wrong gpio lines, including the specification document, and gpioinfo.

Thank you

---

<div class="post-metadata">

**Author:** ![KevinFFF](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/kevinfff/32/15508_2.png) [@KevinFFF](https://forums.developer.nvidia.com/u/KevinFFF)\
**Post date:** [July 13, 2026, 8:45am UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433/15 "2026-07-13T08:45:00Z")

</div>

> [@luquilanzi](#):
>
> I discovered the proper pinout for PIN 15 corresponds to gpiochip0 line 108. This is now working. I would like to know why all the recommendations on what to do were giving the wrong gpio lines, including the specification document, and gpioinfo.

GPIO numbering/naming may be differ from the different perspectives.  
If you want to control PIN15 of 40pins header on AGX Orin devkit, you can check the `NVIDIA Jetson AGX Orin Developer Kit Carrier Board Specification` first.  
 ![image](https://global.discourse-cdn.com/nvidia/original/4X/f/5/d/f5d793d2f31902f96093b2c36ed27528796a1a25.png)  
It gives you the `PN.01`.  
So, you can run the following command to check the its line from gpiod.

```auto
$ sudo gpioinfo|grep PN.01
        line 85: "PN.01" unused input active-high
$ sudo gpiofind "PN.01"
gpiochip0 85

```

You would know that PN.01 is from `line 85` of `gpiochip0` controller.  
As a result, I suggested you run the following commands to control it.

```auto
# gpioset --mode=wait `gpiofind "PN.01"`=0
# gpioset --mode=wait `gpiofind "PN.01"`=1

```

Please note that the `--mode=wait` is to ensure the pin state being controlled.  
If you terminate the process, then the pin state may be recovered to original state.

---

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**Author:** ![system](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/system/32/68080_2.png) [@system](https://forums.developer.nvidia.com/u/system)\
**Post date:** [July 27, 2026, 8:45am UTC](https://forums.developer.nvidia.com/t/jetson-orin-agx-development-board-driving-gpio-high-using-linux-cli/373433/16 "2026-07-27T08:45:25Z")

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