Jetson Orin: DP Lane0 and Lane2

Hi NV Support Team
Some confuse about Orin_Jetson_Series_Pinmux_Config for DP Lane0 / Lane2 with Jetson_AGX_Orin_Design_Guide_DG-10653-001_v1.0.
A51&A50: from pinmux DP0_TXP0/N0. but from DG the used as LAN2+/2- ( DP0_TXP2/N2)
Which one is correct?


The pinmux default usage show the HDMI mapping and not the DP mapping as used on the DevKit. Lanes 0/2 should be swapped for DP usage.

So our HW design can keep same as P3737_A04_OrCAD_schematics.pdf as it default used as HDMI mapping? Then SW side to swap for DP usage only.

It is DP default in P3737 schematic. You only need to follow the HDMI part in Design Guide to make circuit design.

From pinmux DP0_TXP0/N0 is correct ?
As the design guideline for DP connector the A51 function is LANE2 not LANE0.

Current SW already has WAR for this.

What is meas: WAR?

It means workaround.

So i will follow up P3737 design.
A50&A51 used as DP_TX2_N/P connect to DP connector LANE 2N/P ( Pin9 &7)
Because your SW already have workaround for this case.
Is it correct?


Follow the Design Guide for HDMI or DP design.