Jetson Orin NANO FDCAN at 5M

Hi,

I have the same problem as the topic below. is there any suggestion?

Using custom board and Jp6.2
init as below

sudo modprobe -r mttcan
sudo modprobe -r can_raw
sudo modprobe -r can

sudo modprobe can
sudo modprobe can_raw
sudo modprobe mttcan

sleep 0.5
sudo bash -c "echo 0x600 > /sys/devices/platform/bus@0/c310000.mttcan/net/can0/tdc_offset"

CAN_INTERFACE=can0
sudo ip link set up ${CAN_INTERFACE} type can bitrate 500000 dbitrate 5000000 berr-reporting on fd on restart-ms 100

I can send 123#abababab with can-2.0, but failed on123##1.99887766554433221100 with can-fd

And I also can not find the tdcr but tdc_offset, so set at tdc_offset
https://docs.nvidia.com/jetson/archives/r36.3/DeveloperGuide/HR/ControllerAreaNetworkCan.html?highlight=tdcr#managing-the-network

if any log required, please help to tell me

Hi zax,

What’s the CAN transceiver you are using?
Have you confirmed it supports CAN-FD with up to 5MHz?

Yes, it is the expected node to configure tdcr for mttcan can0.

Is there any error in dmesg when you configure this?

Hi KevinFFF,

Here’s transceiver info
https://www.nxp.com/part/TJA1442ATK

it support up to 5Mbit/s

Is there any error in dmesg when you configure this?

NO error message

[ 1211.469378] mttcan c310000.mttcan can0: Bitrate set
[ 1211.469494] mttcan_controller_config: ctrlmode 30
[ 1211.469515] mttcan c310000.mttcan can0: Bitrate set
[ 1211.469630] IPv6: ADDRCONF(NETDEV_CHANGE): can0: link becomes ready

Hi @KevinFFF ,

I’ve tried to send the message only with ESI enable, and it is work
ex 123##2.99887766554433221100

And even I did not enable any of BRS and ESI, the message still can be seen
ex 123##0.99887766554433221100

Is there any command to enable BRS ?

Please try the following commands to transmit data.

$ cangen -L 64 -I 123 -f -b can0
Or
$ cansend can0 123##150

Hi KevinFFF,

it still failed to see any message
both cangen and cansend

Have you tried if it works with 4MHz/4.5MHz/4.8MHz?

Please also share the result of the following command on your board .

$ sudo su
# grep "" /sys/kernel/debug/bpmp/debug/clk/can1*/possible_parents
# grep "" /sys/kernel/debug/bpmp/debug/clk/can1*/parent
# grep "" /sys/kernel/debug/bpmp/debug/clk/can1*/max_rate
# grep "" /sys/kernel/debug/bpmp/debug/clk/can1*/rate

I just tried this morning, and it still not work

here’re results

grep "" /sys/kernel/debug/bpmp/debug/clk/can1*/possible_parents
pllp_out0 pll_c pll_aon clk_32k osc 


grep "" /sys/kernel/debug/bpmp/debug/clk/can1*/parent
/sys/kernel/debug/bpmp/debug/clk/can1_core/parent:can1
/sys/kernel/debug/bpmp/debug/clk/can1_host/parent:can1
/sys/kernel/debug/bpmp/debug/clk/can1/parent:pll_aon

grep "" /sys/kernel/debug/bpmp/debug/clk/can1*/max_rate
/sys/kernel/debug/bpmp/debug/clk/can1_core/max_rate:200000000
/sys/kernel/debug/bpmp/debug/clk/can1_host/max_rate:200000000
/sys/kernel/debug/bpmp/debug/clk/can1/max_rate:200000000


grep "" /sys/kernel/debug/bpmp/debug/clk/can1*/rate
/sys/kernel/debug/bpmp/debug/clk/can1_core/rate:50000000
/sys/kernel/debug/bpmp/debug/clk/can1_host/rate:200000000
/sys/kernel/debug/bpmp/debug/clk/can1/rate:200000000

What’s the maximum rate you can achieve currently? (1MHz? 3MHz?)

Please check if configure the clock for can1_core to 200MHz can help for your issue.

$ sudo su
# echo 200000000 > /sys/kernel/debug/bpmp/debug/clk/can1_core/rate

sorry late for reply

2MHz

still not message showed

Is there any other suggestion?

Do you mean it can achieve 2MHz but you want it works with 5MHz CAN-FD data?
If so, what’s the difference in the result when you use dbitrate higher than 2MHz?
Just no data from candump?

Please also share the block diagram of your connection for further check.

Yes

The dmesg showed some error, and no data print out
can_fd_failed_dump.txt (2.3 KB)
can_fd_failed_send.txt (3.0 KB)

here’s schema, I just connect 2 jetson devices with can0_H and can0_L

By the way, Is it possible relate to the wire’s length or material?

Do you have 120ohm as terminal resistor?
Currently, it seems not included in your schematic.

Thanks for reply

Do you mean I need a 120ohm terminal resistor to achieve higher bit rate ?

I think 120ohm is required for CAN interface.
You can refer to termination - Why does the CAN bus use a 120 ohm resistor as the terminating resistor and not any other value? - Electrical Engineering Stack Exchange for details.

Hi
I have check with our EE

The terminal resistor is this one (R63 120)

Okay.

For higher bitrate like 5MHz, some tuning might be required if getting bit errors.
It depends on the trace length between the SOC and the CAN PHY. TDCO field might need to be optimized depending on design factors like PCB trace lengths, data sheet parameters of CAN PHY used.

Have you tried other value for tdc_offset?

what value can I set for tdc_offset

The suggested value is 0x600, but you can configure other value to check if you would get different result.