Q1: Flashing over USBSS.
Flashing over USBSS is not supported at present.
Q2: RTC0 or RTC1 for default RTC clock during power off?
The Original default RTC source is set as RTC1 (Orin_RTC), which can not keep time if power off. So a patch to set default RTC to RTC0 (PSEQ_RTC) is needed.
Q3: Is there a signal output can be used to indicate a SW RESET thing?
There is no explicit pin on Orin that indicates an internal SW reset has occurred. Internal SW reset does not propagate to the IO pin. One way to set an indicator is to use the internal watchdog timer and use WDT_RESET_OUTA (GP63) or WDT_RESET_OUTB (GP21) as the indicator. Both signals are available on the CVM connector.
Q4: Why there is no PCIe inter-skew spec in Design Guide?
PCIe pair to pair requirement was so loose (5~20ns), it would be nearly impossible to violate and still meet the max lengths (1.185~2.987ns)
Q5: Can USB2.0 port from a hub combine with USBSS port directly?
One USB2 roothub cannot be paired with multiple USB3 roothubs. Valid design is one USB2 roothub + one USB3 roothub like:
*) USB2 + USB3 in pair connecting to a USB HUB
*) USB2 + USB3 in pair connecting to a PD controller and then to a type-C port
*) USB2 + USB3 in pair connecting to a type-A port
Q6: Can CLK_32K_OUT buffer be omitted on the carrier board?
The buffer on carrier is 74LVC1G07GW which supports open-drain function and so can be used for 3.3V. While the buffer on module is 74LVC2G125 without OD support.
Q7: How many standing force of SoM is OK when attached/fixed a heat sink on SoM?
We didn’t do loading test or pressure test on Stardust in qualification test. We did mechanical shock, drop, assembly test, as they are more representative to the stress in the field.
Q8: What is the operating voltage of RTC?
The level could be 1.65V ~ 5.5V per PMIC datasheet.
Q9: Does devkit support hotplug module?
Please do NOT hotplug module as it could damage board. And also please install the two fix screws during any use case to guarantee module is attached to carrier good enough.
Q10: How to config pins with 3.3v tolerance enabled/disabled?
An external pull-up is necessary for the GPIO pin if its “3.3v tolerance” is enable. If do not need to enable 3.3v tolerance, below setting in dts is necessary then.
“nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;”
Q11: What are the difference between “Board-level” and “System-level” in module data sheet?
Board-level is PCBA qualification test, checking the quality of PCBA. It’s based on JEDEC standard.
System-level is to test the whole system. It’s more usage condition-oriented, simulating real usage scenario. It’s based on IEC or ISO standards. system-level is the whole system including cooling fans, power adapter, chassis, housing, etc.