1.设备树配置
- 设备树是参考
tegra234-camera-ar0234-a00.dtsi以及tegra234-p3740-camera-p3783-a00-overlay.dts进行配置，下面是我的具体配置信息（编译成dtbo的形式加载）;
// SPDX-License-Identifier: GPL-2.0-only
// SPDX-FileCopyrightText: Copyright (c) 2018-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
/dts-v1/;
/plugin/;
#include <dt-bindings/tegra234-p3767-0000-common.h>
#include <dt-bindings/clock/tegra234-clock.h>
#include <dt-bindings/gpio/tegra234-gpio.h>
#define CAM_I2C_MUX TEGRA234_AON_GPIO(CC, 3)
#define CAM0_PWEN TEGRA234_MAIN_GPIO(AC, 0)
/ {
overlay-name = "Camera Neardi GMSL Max96724";
jetson-header-name = "Jetson 24pin CSI Connector";
compatible = JETSON_COMPATIBLE_P3768;
fragment-camera@0 {
target-path = "/";
__overlay__ {
tegra-capture-vi {
num-channels = <4>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual_hawk_vi_in0: endpoint {
vc-id = <0>;
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&dual_hawk_csi_out0>;
};
};
port@1 {
reg = <1>;
dual_hawk_vi_in1: endpoint {
vc-id = <1>;
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&dual_hawk_csi_out1>;
};
};
port@2 {
reg = <2>;
dual_hawk_vi_in2: endpoint {
vc-id = <2>;
port-index = <1>;
bus-width = <4>;
remote-endpoint = <&dual_hawk_csi_out2>;
};
};
port@3 {
reg = <3>;
dual_hawk_vi_in3: endpoint {
vc-id = <3>;
port-index = <1>;
bus-width = <4>;
remote-endpoint = <&dual_hawk_csi_out3>;
};
};
};
};
bus@0 {
host1x@13e00000 {
nvcsi@15a00000 {
num-channels = <4>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual_hawk_csi_in0: endpoint@0 {
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&dual_hawk_out0>;
};
};
port@1 {
reg = <1>;
dual_hawk_csi_out0: endpoint@1 {
remote-endpoint = <&dual_hawk_vi_in0>;
};
};
};
};
channel@1 {
reg = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual_hawk_csi_in1: endpoint@2 {
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&dual_hawk_out1>;
};
};
port@1 {
reg = <1>;
dual_hawk_csi_out1: endpoint@3 {
remote-endpoint = <&dual_hawk_vi_in1>;
};
};
};
};
channel@2 {
reg = <2>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual_hawk_csi_in2: endpoint@4 {
port-index = <1>;
bus-width = <4>;
remote-endpoint = <&dual_hawk_out2>;
};
};
port@1 {
reg = <1>;
dual_hawk_csi_out2: endpoint@5 {
remote-endpoint = <&dual_hawk_vi_in2>;
};
};
};
};
channel@3 {
reg = <3>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual_hawk_csi_in3: endpoint@6 {
port-index = <1>;
bus-width = <4>;
remote-endpoint = <&dual_hawk_out3>;
};
};
port@1 {
reg = <1>;
dual_hawk_csi_out3: endpoint@7 {
remote-endpoint = <&dual_hawk_vi_in3>;
};
};
};
};
};
};
cam_i2cmux {
status = "okay";
compatible = "i2c-mux-gpio";
#address-cells = <1>;
#size-cells = <0>;
mux-gpios = <&gpio_aon CAM_I2C_MUX GPIO_ACTIVE_HIGH>;
i2c-parent = <&cam_i2c>;
i2c@0 {
single_max96712_a@27 {
status = "okay";
compatible = "nvidia,max96712";
reg = <0x27>;
channel = "a";
pwdn-gpios = <&gpio CAM0_PWEN GPIO_ACTIVE_HIGH>;
};
dual_hawk_a@18 {
compatible = "onsemi,ar0234";
clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
<&bpmp TEGRA234_CLK_EXTPERIPH1>;
clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1";
reg = <0x18>;
/* Physical dimensions of sensor */
physical_w = "15.0";
physical_h = "12.5";
sensor_model ="ar0234";
sync_sensor = "HAWK1";
sync_sensor_index = <1>;
supports-alt-exp = "true";
/* Defines number of frames to be dropped by driver internally after applying */
/* sensor crop settings. Some sensors send corrupt frames after applying */
/* crop co-ordinates */
post_crop_frame_drop = "0";
/* Convert Gain to unit of dB (decibel) befor passing to kernel driver */
//use_decibel_gain = "true";
/* enable CID_SENSOR_MODE_ID for sensor modes selection */
use_sensor_mode_id = "true";
/**
* A modeX node is required to support v4l2 driver
* implementation with NVIDIA camera software stack
*
* mclk_khz = "";
* Standard MIPI driving clock, typically 24MHz
*
* num_lanes = "";
* Number of lane channels sensor is programmed to output
*
* tegra_sinterface = "";
* The base tegra serial interface lanes are connected to
*
* vc_id = "";
* The virtual channel id of the sensor.
*
* discontinuous_clk = "";
* The sensor is programmed to use a discontinuous clock on MIPI lanes
*
* dpcm_enable = "true";
* The sensor is programmed to use a DPCM modes
*
* cil_settletime = "";
* MIPI lane settle time value.
* A "0" value attempts to autocalibrate based on mclk_khz and pix_clk_hz
*
* active_w = "";
* Pixel active region width
*
* active_h = "";
* Pixel active region height
*
* dynamic_pixel_bit_depth = "";
* sensor dynamic bit depth for sensor mode
*
* csi_pixel_bit_depth = "";
* sensor output bit depth for sensor mode
*
* mode_type="";
* Sensor mode type, For eg: yuv, Rgb, bayer, bayer_wdr_pwl
*
* pixel_phase="";
* Pixel phase for sensor mode, For eg: rggb, vyuy, rgb888
*
* readout_orientation = "0";
* Based on camera module orientation.
* Only change readout_orientation if you specifically
* Program a different readout order for this mode
*
* line_length = "";
* Pixel line length (width) for sensor mode.
* This is used to calibrate features in our camera stack.
*
* pix_clk_hz = "";
* Sensor pixel clock used for calculations like exposure and framerate
*
*
*
*
* inherent_gain = "";
* Gain obtained inherently from mode (ie. pixel binning)
*
* min_gain_val = ""; (floor to 6 decimal places)
* max_gain_val = ""; (floor to 6 decimal places)
* Gain limits for mode
* if use_decibel_gain = "true", please set the gain as decibel
*
* min_exp_time = ""; (ceil to integer)
* max_exp_time = ""; (ceil to integer)
* Exposure Time limits for mode (us)
*
*
* min_hdr_ratio = "";
* max_hdr_ratio = "";
* HDR Ratio limits for mode
*
* min_framerate = "";
* max_framerate = "";
* Framerate limits for mode (fps)
*
* embedded_metadata_height = "";
* Sensor embedded metadata height in units of rows.
* If sensor does not support embedded metadata value should be 0.
*/
mode0 {/*mode IMX424_MODE_3840X1080_CROP_30FPS*/
mclk_khz = "24000";
num_lanes = "4";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
vc_id = "0";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "0";
dynamic_pixel_bit_depth = "16";
csi_pixel_bit_depth = "16";
mode_type = "yuv";
pixel_phase = "uyvy";
active_w = "1920";
active_h = "1536";
readout_orientation = "0";
line_length = "2200";
inherent_gain = "1";
mclk_multiplier = "3.01";
pix_clk_hz = "200000000";
serdes_pix_clk_hz = "600000000";
gain_factor = "100";
min_gain_val = "100"; /* dB */
max_gain_val = "1600"; /* dB */
step_gain_val = "1"; /* 0.1 */
default_gain = "100";
min_hdr_ratio = "1";
max_hdr_ratio = "1";
framerate_factor = "1000000";
min_framerate = "30000000";
max_framerate = "30000000";
step_framerate = "30000000";
default_framerate = "30000000";
exposure_factor = "1000000";
min_exp_time = "28"; /*us, 2 lines*/
max_exp_time = "22000";
step_exp_time = "1";
default_exp_time = "22000";/* us */
embedded_metadata_height = "0";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual_hawk_out0: endpoint {
vc-id = <0>;
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&dual_hawk_csi_in0>;
};
};
};
};
dual_hawk_b@10 {
compatible = "onsemi,ar0234";
reg = <0x10>;
clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
<&bpmp TEGRA234_CLK_EXTPERIPH1>;
clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1";
/* Physical dimensions of sensor */
physical_w = "15.0";
physical_h = "12.5";
sensor_model ="ar0234";
sync_sensor = "HAWK1";
sync_sensor_index = <2>;
supports-alt-exp = "true";
/* Defines number of frames to be dropped by driver internally after applying */
/* sensor crop settings. Some sensors send corrupt frames after applying */
/* crop co-ordinates */
post_crop_frame_drop = "0";
/* Convert Gain to unit of dB (decibel) befor passing to kernel driver */
//use_decibel_gain = "true";
/* enable CID_SENSOR_MODE_ID for sensor modes selection */
use_sensor_mode_id = "true";
/**
* A modeX node is required to support v4l2 driver
* implementation with NVIDIA camera software stack
*
* mclk_khz = "";
* Standard MIPI driving clock, typically 24MHz
*
* num_lanes = "";
* Number of lane channels sensor is programmed to output
*
* tegra_sinterface = "";
* The base tegra serial interface lanes are connected to
*
* vc_id = "";
* The virtual channel id of the sensor.
*
* discontinuous_clk = "";
* The sensor is programmed to use a discontinuous clock on MIPI lanes
*
* dpcm_enable = "true";
* The sensor is programmed to use a DPCM modes
*
* cil_settletime = "";
* MIPI lane settle time value.
* A "0" value attempts to autocalibrate based on mclk_khz and pix_clk_hz
*
* active_w = "";
* Pixel active region width
*
* active_h = "";
* Pixel active region height
*
* dynamic_pixel_bit_depth = "";
* sensor dynamic bit depth for sensor mode
*
* csi_pixel_bit_depth = "";
* sensor output bit depth for sensor mode
*
* mode_type="";
* Sensor mode type, For eg: yuv, Rgb, bayer, bayer_wdr_pwl
*
* pixel_phase="";
* Pixel phase for sensor mode, For eg: rggb, vyuy, rgb888
*
* readout_orientation = "0";
* Based on camera module orientation.
* Only change readout_orientation if you specifically
* Program a different readout order for this mode
*
* line_length = "";
* Pixel line length (width) for sensor mode.
* This is used to calibrate features in our camera stack.
*
* pix_clk_hz = "";
* Sensor pixel clock used for calculations like exposure and framerate
*
*
*
*
* inherent_gain = "";
* Gain obtained inherently from mode (ie. pixel binning)
*
* min_gain_val = ""; (floor to 6 decimal places)
* max_gain_val = ""; (floor to 6 decimal places)
* Gain limits for mode
* if use_decibel_gain = "true", please set the gain as decibel
*
* min_exp_time = ""; (ceil to integer)
* max_exp_time = ""; (ceil to integer)
* Exposure Time limits for mode (us)
*
*
* min_hdr_ratio = "";
* max_hdr_ratio = "";
* HDR Ratio limits for mode
*
* min_framerate = "";
* max_framerate = "";
* Framerate limits for mode (fps)
*
* embedded_metadata_height = "";
* Sensor embedded metadata height in units of rows.
* If sensor does not support embedded metadata value should be 0.
*/
mode0 {/*mode IMX424_MODE_3840X1080_CROP_30FPS*/
mclk_khz = "24000";
num_lanes = "4";
tegra_sinterface = "serial_a";
vc_id = "1";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "0";
dynamic_pixel_bit_depth = "16";
csi_pixel_bit_depth = "16";
mode_type = "yuv";
pixel_phase = "uyvy";
active_w = "1920";
active_h = "1536";
readout_orientation = "0";
line_length = "2200";
inherent_gain = "1";
mclk_multiplier = "3.01";
pix_clk_hz = "200000000";
serdes_pix_clk_hz = "600000000";
gain_factor = "100";
min_gain_val = "100"; /* dB */
max_gain_val = "1600"; /* dB */
step_gain_val = "1"; /* 0.1 */
default_gain = "100";
min_hdr_ratio = "1";
max_hdr_ratio = "1";
framerate_factor = "1000000";
min_framerate = "30000000";
max_framerate = "30000000";
step_framerate = "30000000";
default_framerate = "30000000";
exposure_factor = "1000000";
min_exp_time = "28"; /*us, 2 lines*/
max_exp_time = "22000";
step_exp_time = "1";
default_exp_time = "22000";/* us */
embedded_metadata_height = "0";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual_hawk_out1: endpoint {
vc-id = <1>;
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&dual_hawk_csi_in1>;
};
};
};
};
dual_hawk_c@12 {
compatible = "onsemi,ar0234";
reg = <0x12>;
clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
<&bpmp TEGRA234_CLK_EXTPERIPH1>;
clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1";
/* Physical dimensions of sensor */
physical_w = "15.0";
physical_h = "12.5";
sensor_model ="ar0234";
sync_sensor = "HAWK2";
sync_sensor_index = <1>;
supports-alt-exp = "true";
/* Defines number of frames to be dropped by driver internally after applying */
/* sensor crop settings. Some sensors send corrupt frames after applying */
/* crop co-ordinates */
post_crop_frame_drop = "0";
/* Convert Gain to unit of dB (decibel) befor passing to kernel driver */
//use_decibel_gain = "true";
/* enable CID_SENSOR_MODE_ID for sensor modes selection */
use_sensor_mode_id = "true";
/**
* A modeX node is required to support v4l2 driver
* implementation with NVIDIA camera software stack
*
* mclk_khz = "";
* Standard MIPI driving clock, typically 24MHz
*
* num_lanes = "";
* Number of lane channels sensor is programmed to output
*
* tegra_sinterface = "";
* The base tegra serial interface lanes are connected to
*
* vc_id = "";
* The virtual channel id of the sensor.
*
* discontinuous_clk = "";
* The sensor is programmed to use a discontinuous clock on MIPI lanes
*
* dpcm_enable = "true";
* The sensor is programmed to use a DPCM modes
*
* cil_settletime = "";
* MIPI lane settle time value.
* A "0" value attempts to autocalibrate based on mclk_khz and pix_clk_hz
*
* active_w = "";
* Pixel active region width
*
* active_h = "";
* Pixel active region height
*
* dynamic_pixel_bit_depth = "";
* sensor dynamic bit depth for sensor mode
*
* csi_pixel_bit_depth = "";
* sensor output bit depth for sensor mode
*
* mode_type="";
* Sensor mode type, For eg: yuv, Rgb, bayer, bayer_wdr_pwl
*
* pixel_phase="";
* Pixel phase for sensor mode, For eg: rggb, vyuy, rgb888
*
* readout_orientation = "0";
* Based on camera module orientation.
* Only change readout_orientation if you specifically
* Program a different readout order for this mode
*
* line_length = "";
* Pixel line length (width) for sensor mode.
* This is used to calibrate features in our camera stack.
*
* pix_clk_hz = "";
* Sensor pixel clock used for calculations like exposure and framerate
*
*
*
*
* inherent_gain = "";
* Gain obtained inherently from mode (ie. pixel binning)
*
* min_gain_val = ""; (floor to 6 decimal places)
* max_gain_val = ""; (floor to 6 decimal places)
* Gain limits for mode
* if use_decibel_gain = "true", please set the gain as decibel
*
* min_exp_time = ""; (ceil to integer)
* max_exp_time = ""; (ceil to integer)
* Exposure Time limits for mode (us)
*
*
* min_hdr_ratio = "";
* max_hdr_ratio = "";
* HDR Ratio limits for mode
*
* min_framerate = "";
* max_framerate = "";
* Framerate limits for mode (fps)
*
* embedded_metadata_height = "";
* Sensor embedded metadata height in units of rows.
* If sensor does not support embedded metadata value should be 0.
*/
mode0 {/*mode IMX424_MODE_3840X1080_CROP_30FPS*/
mclk_khz = "24000";
num_lanes = "4";
tegra_sinterface = "serial_a";
vc_id = "2";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "0";
dynamic_pixel_bit_depth = "16";
csi_pixel_bit_depth = "16";
mode_type = "yuv";
pixel_phase = "uyvy";
active_w = "1920";
active_h = "1536";
readout_orientation = "0";
line_length = "2200";
inherent_gain = "1";
mclk_multiplier = "3.01";
pix_clk_hz = "200000000";
serdes_pix_clk_hz = "600000000";
gain_factor = "100";
min_gain_val = "100"; /* dB */
max_gain_val = "1600"; /* dB */
step_gain_val = "1"; /* 0.1 */
default_gain = "100";
min_hdr_ratio = "1";
max_hdr_ratio = "1";
framerate_factor = "1000000";
min_framerate = "30000000";
max_framerate = "30000000";
step_framerate = "30000000";
default_framerate = "30000000";
exposure_factor = "1000000";
min_exp_time = "28"; /*us, 2 lines*/
max_exp_time = "22000";
step_exp_time = "1";
default_exp_time = "22000";/* us */
embedded_metadata_height = "0";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual_hawk_out2: endpoint {
vc-id = <2>;
port-index = <1>;
bus-width = <4>;
remote-endpoint = <&dual_hawk_csi_in2>;
};
};
};
};
dual_hawk_d@14 {
compatible = "onsemi,ar0234";
reg = <0x14>;
clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
<&bpmp TEGRA234_CLK_EXTPERIPH1>;
clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1";
/* Physical dimensions of sensor */
physical_w = "15.0";
physical_h = "12.5";
sensor_model ="ar0234";
sync_sensor = "HAWK2";
sync_sensor_index = <2>;
supports-alt-exp = "true";
/* Defines number of frames to be dropped by driver internally after applying */
/* sensor crop settings. Some sensors send corrupt frames after applying */
/* crop co-ordinates */
post_crop_frame_drop = "0";
/* Convert Gain to unit of dB (decibel) befor passing to kernel driver */
//use_decibel_gain = "true";
/* enable CID_SENSOR_MODE_ID for sensor modes selection */
use_sensor_mode_id = "true";
/**
* A modeX node is required to support v4l2 driver
* implementation with NVIDIA camera software stack
*
* mclk_khz = "";
* Standard MIPI driving clock, typically 24MHz
*
* num_lanes = "";
* Number of lane channels sensor is programmed to output
*
* tegra_sinterface = "";
* The base tegra serial interface lanes are connected to
*
* vc_id = "";
* The virtual channel id of the sensor.
*
* discontinuous_clk = "";
* The sensor is programmed to use a discontinuous clock on MIPI lanes
*
* dpcm_enable = "true";
* The sensor is programmed to use a DPCM modes
*
* cil_settletime = "";
* MIPI lane settle time value.
* A "0" value attempts to autocalibrate based on mclk_khz and pix_clk_hz
*
* active_w = "";
* Pixel active region width
*
* active_h = "";
* Pixel active region height
*
* dynamic_pixel_bit_depth = "";
* sensor dynamic bit depth for sensor mode
*
* csi_pixel_bit_depth = "";
* sensor output bit depth for sensor mode
*
* mode_type="";
* Sensor mode type, For eg: yuv, Rgb, bayer, bayer_wdr_pwl
*
* pixel_phase="";
* Pixel phase for sensor mode, For eg: rggb, vyuy, rgb888
*
* readout_orientation = "0";
* Based on camera module orientation.
* Only change readout_orientation if you specifically
* Program a different readout order for this mode
*
* line_length = "";
* Pixel line length (width) for sensor mode.
* This is used to calibrate features in our camera stack.
*
* pix_clk_hz = "";
* Sensor pixel clock used for calculations like exposure and framerate
*
*
*
*
* inherent_gain = "";
* Gain obtained inherently from mode (ie. pixel binning)
*
* min_gain_val = ""; (floor to 6 decimal places)
* max_gain_val = ""; (floor to 6 decimal places)
* Gain limits for mode
* if use_decibel_gain = "true", please set the gain as decibel
*
* min_exp_time = ""; (ceil to integer)
* max_exp_time = ""; (ceil to integer)
* Exposure Time limits for mode (us)
*
*
* min_hdr_ratio = "";
* max_hdr_ratio = "";
* HDR Ratio limits for mode
*
* min_framerate = "";
* max_framerate = "";
* Framerate limits for mode (fps)
*
* embedded_metadata_height = "";
* Sensor embedded metadata height in units of rows.
* If sensor does not support embedded metadata value should be 0.
*/
mode0 {/*mode IMX424_MODE_3840X1080_CROP_30FPS*/
mclk_khz = "24000";
num_lanes = "4";
tegra_sinterface = "serial_a";
vc_id = "3";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "0";
dynamic_pixel_bit_depth = "16";
csi_pixel_bit_depth = "16";
mode_type = "yuv";
pixel_phase = "uyvy";
active_w = "1920";
active_h = "1536";
readout_orientation = "0";
line_length = "2200";
inherent_gain = "1";
mclk_multiplier = "3.01";
pix_clk_hz = "200000000";
serdes_pix_clk_hz = "600000000";
gain_factor = "100";
min_gain_val = "100"; /* dB */
max_gain_val = "1600"; /* dB */
step_gain_val = "1"; /* 0.1 */
default_gain = "100";
min_hdr_ratio = "1";
max_hdr_ratio = "1";
framerate_factor = "1000000";
min_framerate = "30000000";
max_framerate = "30000000";
step_framerate = "30000000";
default_framerate = "30000000";
exposure_factor = "1000000";
min_exp_time = "28"; /*us, 2 lines*/
max_exp_time = "22000";
step_exp_time = "1";
default_exp_time = "22000";/* us */
embedded_metadata_height = "0";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual_hawk_out3: endpoint {
vc-id = <3>;
port-index = <1>;
bus-width = <4>;
remote-endpoint = <&dual_hawk_csi_in3>;
};
};
};
};
};
i2c@1 {
};
};
};
tegra-camera-platform {
compatible = "nvidia, tegra-camera-platform";
/**
* Physical settings to calculate max ISO BW
*
* num_csi_lanes = <>;
* Total number of CSI lanes when all cameras are active
*
* max_lane_speed = <>;
* Max lane speed in Kbit/s
*
* min_bits_per_pixel = <>;
* Min bits per pixel
*
* vi_peak_byte_per_pixel = <>;
* Max byte per pixel for the VI ISO case
*
* vi_bw_margin_pct = <>;
* Vi bandwidth margin in percentage
*
* max_pixel_rate = <>;
* Max pixel rate in Kpixel/s for the ISP ISO case
*
* isp_peak_byte_per_pixel = <>;
* Max byte per pixel for the ISP ISO case
*
* isp_bw_margin_pct = <>;
* Isp bandwidth margin in percentage
*/
num_csi_lanes = <4>;
max_lane_speed = <25000000>;
min_bits_per_pixel = <10>;
vi_peak_byte_per_pixel = <2>;
vi_bw_margin_pct = <25>;
isp_peak_byte_per_pixel = <5>;
isp_bw_margin_pct = <25>;
/**
* The general guideline for naming badge_info contains 3 parts, and is as follows,
* The first part is the camera_board_id for the module; if the module is in a FFD
* platform, then use the platform name for this part.
* The second part contains the position of the module, ex. "rear" or "front".
* The third part contains the last 6 characters of a part number which is found
* in the module's specsheet from the vender.
*/
modules {
module0 {
badge = "dual_hawk_bottomleft";
position = "bottomleft";
orientation = "1";
drivernode0 {
/* Declare PCL support driver (classically known as guid) */
pcl_id = "v4l2_sensor";
/* Declare the device-tree hierarchy to driver instance */
sysfs-device-tree = "/sys/firmware/devicetree/base/bus@0/i2c@3180000/tca9546@70/i2c@0/dual_hawk_a@18";
};
};
module1 {
badge = "dual_hawk_bottomright";
position = "bottomright";
orientation = "1";
drivernode0 {
/* Declare PCL support driver (classically known as guid) */
pcl_id = "v4l2_sensor";
/* Declare the device-tree hierarchy to driver instance */
sysfs-device-tree = "/sys/firmware/devicetree/base/bus@0/i2c@3180000/tca9546@70/i2c@0/dual_hawk_b@10";
};
};
module2 {
badge = "dual_hawk_centerleft";
position = "centerleft";
orientation = "1";
drivernode0 {
/* Declare PCL support driver (classically known as guid) */
pcl_id = "v4l2_sensor";
sysfs-device-tree = "/sys/firmware/devicetree/base/bus@0/i2c@3180000/tca9546@70/i2c@1/dual_hawk_c@18";
};
};
module3 {
badge = "dual_hawk_centerright";
position = "centerright";
orientation = "1";
drivernode0 {
/* Declare PCL support driver (classically known as guid) */
pcl_id = "v4l2_sensor";
/* Declare the device-tree hierarchy to driver instance */
sysfs-device-tree = "/sys/firmware/devicetree/base/bus@0/i2c@3180000/tca9546@70/i2c@1/dual_hawk_d@10";
};
};
};
};
};
};
};
2. 硬件连接
- 核心板是采购自贵司的
jetson orin nx，底板是我司自制；
max96724f的port-A (4lane) 输出，连接到jetson orin nx的CSI0_D0、CSI0_D1、CSI1_D0、CSI1_D1以及CSI0_CLK组成4lane接收；
- 供电部分是没有问题的，可以正常
detect到max96724f以及加串(sensing的摄像头）；
3. DEBUG信息
- 加载驱动后正常生成
/dev/videox 以及 /dev/media0;
root@tegra-ubuntu:~# v4l2-ctl --list-devices
NVIDIA Tegra Video Input Device (platform:tegra-camrtc-ca):
/dev/media0
vi-output, ar0234 10-0010 (platform:tegra-capture-vi:0):
/dev/video2
/dev/video3
vi-output, ar0234 10-0014 (platform:tegra-capture-vi:1):
/dev/video0
/dev/video1
root@tegra-ubuntu:~# media-ctl -p -d /dev/media0
Media controller API version 5.15.136
Media device information
------------------------
driver tegra-camrtc-ca
model NVIDIA Tegra Video Input Device
serial
bus info
hw revision 0x3
driver version 5.15.136
Device topology
- entity 1: 13e00000.host1x:nvcsi@15a00000- (2 pads, 2 links)
type V4L2 subdev subtype Unknown flags 0
device node name /dev/v4l-subdev0
pad0: Sink
<- "ar0234 10-0018":0 [ENABLED]
pad1: Source
-> "vi-output, ar0234 10-0018":0 [ENABLED]
- entity 4: 13e00000.host1x:nvcsi@15a00000- (2 pads, 2 links)
type V4L2 subdev subtype Unknown flags 0
device node name /dev/v4l-subdev1
pad0: Sink
<- "ar0234 10-0010":0 [ENABLED]
pad1: Source
-> "vi-output, ar0234 10-0010":0 [ENABLED]
- entity 7: 13e00000.host1x:nvcsi@15a00000- (2 pads, 2 links)
type V4L2 subdev subtype Unknown flags 0
device node name /dev/v4l-subdev2
pad0: Sink
<- "ar0234 10-0012":0 [ENABLED]
pad1: Source
-> "vi-output, ar0234 10-0012":0 [ENABLED]
- entity 10: 13e00000.host1x:nvcsi@15a00000- (2 pads, 2 links)
type V4L2 subdev subtype Unknown flags 0
device node name /dev/v4l-subdev3
pad0: Sink
<- "ar0234 10-0014":0 [ENABLED]
pad1: Source
-> "vi-output, ar0234 10-0014":0 [ENABLED]
- entity 13: ar0234 10-0014 (1 pad, 1 link)
type V4L2 subdev subtype Sensor flags 0
device node name /dev/v4l-subdev4
pad0: Source
[fmt:UYVY8_1X16/1920x1200 field:none colorspace:srgb]
-> "13e00000.host1x:nvcsi@15a00000-":0 [ENABLED]
- entity 15: vi-output, ar0234 10-0014 (1 pad, 1 link)
type Node subtype V4L flags 0
device node name /dev/video0
pad0: Sink
<- "13e00000.host1x:nvcsi@15a00000-":1 [ENABLED]
- entity 33: ar0234 10-0012 (1 pad, 1 link)
type V4L2 subdev subtype Sensor flags 0
device node name /dev/v4l-subdev5
pad0: Source
[fmt:UYVY8_1X16/1920x1200 field:none colorspace:srgb]
-> "13e00000.host1x:nvcsi@15a00000-":0 [ENABLED]
- entity 35: vi-output, ar0234 10-0012 (1 pad, 1 link)
type Node subtype V4L flags 0
device node name /dev/video1
pad0: Sink
<- "13e00000.host1x:nvcsi@15a00000-":1 [ENABLED]
- entity 45: ar0234 10-0010 (1 pad, 1 link)
type V4L2 subdev subtype Sensor flags 0
device node name /dev/v4l-subdev6
pad0: Source
[fmt:UYVY8_1X16/1920x1200 field:none colorspace:srgb]
-> "13e00000.host1x:nvcsi@15a00000-":0 [ENABLED]
- entity 47: vi-output, ar0234 10-0010 (1 pad, 1 link)
type Node subtype V4L flags 0
device node name /dev/video2
pad0: Sink
<- "13e00000.host1x:nvcsi@15a00000-":1 [ENABLED]
- entity 57: ar0234 10-0018 (1 pad, 1 link)
type V4L2 subdev subtype Sensor flags 0
device node name /dev/v4l-subdev7
pad0: Source
[fmt:UYVY8_1X16/1920x1200 field:none colorspace:srgb]
-> "13e00000.host1x:nvcsi@15a00000-":0 [ENABLED]
- entity 59: vi-output, ar0234 10-0018 (1 pad, 1 link)
type Node subtype V4L flags 0
device node name /dev/video3
pad0: Sink
<- "13e00000.host1x:nvcsi@15a00000-":1 [ENABLED]
- 使能max96724f配置其输出（这部分已经在其它soc平台验证过），并抓图报错；
# 抓图测试的指令：
# v4l2-ctl --set-fmt-video=width=1280,height=720 --stream-mmap --stream-count=10 -d /dev/video0
# v4l2-ctl --set-fmt-video=width=1280,height=720 --stream-mmap --stream-count=10 -d /dev/video1
# v4l2-ctl --set-fmt-video=width=1280,height=720 --stream-mmap --stream-count=10 -d /dev/video2
# v4l2-ctl --set-fmt-video=width=1280,height=720 --stream-mmap --stream-count=10 -d /dev/video3
# 抓图报错信息，四个video设备节点报错相同
[ 1686.754286] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[ 1686.754307] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[ 1686.755548] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[ 1689.282053] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[ 1689.282069] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[ 1689.283204] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[ 1698.786060] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[ 1698.786084] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[ 1698.787427] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[ 1701.346296] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[ 1701.346316] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[ 1701.347297] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[ 1703.906035] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[ 1703.906051] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[ 1703.907471] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
echo 1 > /sys/kernel/debug/tracing/tracing_on
echo 30720 > /sys/kernel/debug/tracing/buffer_size_kb
echo 1 > /sys/kernel/debug/tracing/events/tegra_rtcpu/enable
echo 1 > /sys/kernel/debug/tracing/events/freertos/enable
echo 3 > /sys/kernel/debug/camrtc/log-level
echo 1 > /sys/kernel/debug/tracing/events/camera_common/enable
echo > /sys/kernel/debug/tracing/trace
root@tegra-ubuntu:~# cat /sys/kernel/debug/tracing/trace
# tracer: nop
#
# entries-in-buffer/entries-written: 19/19 #P:4
#
# _-------=> irqs-off
# / _------=> need-resched
# | / _-----=> need-resched-lazy
# || / _----=> hardirq/softirq
# ||| / _---=> preempt-depth
# |||| / _--=> preempt-lazy-depth
# ||||| / _-=> migrate-disable
# |||||| / delay
# TASK-PID CPU# ||||||| TIMESTAMP FUNCTION
# | | | ||||||| | |
v4l2-ctl-2952 [001] ....... 1867.730780: tegra_channel_open: vi-output, ar0234 10-0014
v4l2-ctl-2952 [001] ....... 1867.744179: tegra_channel_set_power: ar0234 10-0014 : 0x1
v4l2-ctl-2952 [001] ....... 1867.744256: camera_common_s_power: status : 0x1
v4l2-ctl-2952 [001] ....... 1867.745108: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2952 [001] ....... 1867.745110: csi_s_power: enable : 0x1
v4l2-ctl-2952 [001] ....... 1867.745622: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2953 [002] ....... 1867.755540: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1867.755550: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1867.755552: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1867.755554: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
v4l2-ctl-2952 [003] ....... 1867.755621: tegra_channel_set_stream: enable : 0x1
v4l2-ctl-2952 [003] ....... 1867.759160: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2952 [003] ....... 1867.759164: csi_s_stream: enable : 0x1
v4l2-ctl-2952 [003] ....... 1867.759813: tegra_channel_set_stream: ar0234 10-0014 : 0x1
vi-output, ar02-2954 [003] ....... 1870.307071: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2953 [002] ....... 1870.307186: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1870.307197: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1870.307199: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1870.307200: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
root@tegra-ubuntu:~# cat /sys/kernel/debug/tracing/trace
# tracer: nop
#
# entries-in-buffer/entries-written: 48/48 #P:4
#
# _-------=> irqs-off
# / _------=> need-resched
# | / _-----=> need-resched-lazy
# || / _----=> hardirq/softirq
# ||| / _---=> preempt-depth
# |||| / _--=> preempt-lazy-depth
# ||||| / _-=> migrate-disable
# |||||| / delay
# TASK-PID CPU# ||||||| TIMESTAMP FUNCTION
# | | | ||||||| | |
v4l2-ctl-2952 [001] ....... 1867.730780: tegra_channel_open: vi-output, ar0234 10-0014
v4l2-ctl-2952 [001] ....... 1867.744179: tegra_channel_set_power: ar0234 10-0014 : 0x1
v4l2-ctl-2952 [001] ....... 1867.744256: camera_common_s_power: status : 0x1
v4l2-ctl-2952 [001] ....... 1867.745108: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2952 [001] ....... 1867.745110: csi_s_power: enable : 0x1
v4l2-ctl-2952 [001] ....... 1867.745622: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2953 [002] ....... 1867.755540: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1867.755550: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1867.755552: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1867.755554: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
v4l2-ctl-2952 [003] ....... 1867.755621: tegra_channel_set_stream: enable : 0x1
v4l2-ctl-2952 [003] ....... 1867.759160: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2952 [003] ....... 1867.759164: csi_s_stream: enable : 0x1
v4l2-ctl-2952 [003] ....... 1867.759813: tegra_channel_set_stream: ar0234 10-0014 : 0x1
vi-output, ar02-2954 [003] ....... 1870.307071: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2953 [002] ....... 1870.307186: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1870.307197: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1870.307199: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1870.307200: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2954 [003] ....... 1872.867080: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2953 [002] ....... 1872.867208: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1872.867221: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1872.867223: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1872.867225: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
v4l2-ctl-2952 [001] ....... 1873.011079: tegra_channel_close: vi-output, ar0234 10-0014
vi-output, ar02-2954 [003] ....... 1875.427136: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
v4l2-ctl-2952 [001] ....... 1875.427247: tegra_channel_set_stream: enable : 0x0
v4l2-ctl-2952 [001] ....... 1875.427249: tegra_channel_set_stream: ar0234 10-0014 : 0x0
v4l2-ctl-2952 [001] ....... 1875.427258: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x0
v4l2-ctl-2952 [001] ....... 1875.427260: csi_s_stream: enable : 0x0
v4l2-ctl-2952 [003] ....... 1875.430995: tegra_channel_set_power: ar0234 10-0014 : 0x0
v4l2-ctl-2952 [003] ....... 1875.431005: camera_common_s_power: status : 0x0
v4l2-ctl-2952 [003] ....... 1875.431183: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x0
v4l2-ctl-2952 [003] ....... 1875.431186: csi_s_power: enable : 0x0
v4l2-ctl-2958 [002] ....... 1876.547984: tegra_channel_open: vi-output, ar0234 10-0012
v4l2-ctl-2958 [002] ....... 1876.561335: tegra_channel_set_power: ar0234 10-0012 : 0x1
v4l2-ctl-2958 [002] ....... 1876.561409: camera_common_s_power: status : 0x1
v4l2-ctl-2958 [002] ....... 1876.561887: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2958 [002] ....... 1876.561888: csi_s_power: enable : 0x1
v4l2-ctl-2958 [002] ....... 1876.562186: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2959 [003] ....... 1876.562420: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1876.562428: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1876.562430: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1876.562431: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
v4l2-ctl-2958 [001] ....... 1876.562460: tegra_channel_set_stream: enable : 0x1
v4l2-ctl-2958 [001] ....... 1876.565551: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2958 [001] ....... 1876.565554: csi_s_stream: enable : 0x1
v4l2-ctl-2958 [002] ....... 1876.565654: tegra_channel_set_stream: ar0234 10-0012 : 0x1
root@tegra-ubuntu:~# cat /sys/kernel/debug/tracing/trace
# tracer: nop
#
# entries-in-buffer/entries-written: 92/92 #P:4
#
# _-------=> irqs-off
# / _------=> need-resched
# | / _-----=> need-resched-lazy
# || / _----=> hardirq/softirq
# ||| / _---=> preempt-depth
# |||| / _--=> preempt-lazy-depth
# ||||| / _-=> migrate-disable
# |||||| / delay
# TASK-PID CPU# ||||||| TIMESTAMP FUNCTION
# | | | ||||||| | |
v4l2-ctl-2952 [001] ....... 1867.730780: tegra_channel_open: vi-output, ar0234 10-0014
v4l2-ctl-2952 [001] ....... 1867.744179: tegra_channel_set_power: ar0234 10-0014 : 0x1
v4l2-ctl-2952 [001] ....... 1867.744256: camera_common_s_power: status : 0x1
v4l2-ctl-2952 [001] ....... 1867.745108: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2952 [001] ....... 1867.745110: csi_s_power: enable : 0x1
v4l2-ctl-2952 [001] ....... 1867.745622: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2953 [002] ....... 1867.755540: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1867.755550: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1867.755552: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1867.755554: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
v4l2-ctl-2952 [003] ....... 1867.755621: tegra_channel_set_stream: enable : 0x1
v4l2-ctl-2952 [003] ....... 1867.759160: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2952 [003] ....... 1867.759164: csi_s_stream: enable : 0x1
v4l2-ctl-2952 [003] ....... 1867.759813: tegra_channel_set_stream: ar0234 10-0014 : 0x1
vi-output, ar02-2954 [003] ....... 1870.307071: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2953 [002] ....... 1870.307186: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1870.307197: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1870.307199: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1870.307200: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2954 [003] ....... 1872.867080: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2953 [002] ....... 1872.867208: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1872.867221: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1872.867223: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1872.867225: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
v4l2-ctl-2952 [001] ....... 1873.011079: tegra_channel_close: vi-output, ar0234 10-0014
vi-output, ar02-2954 [003] ....... 1875.427136: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
v4l2-ctl-2952 [001] ....... 1875.427247: tegra_channel_set_stream: enable : 0x0
v4l2-ctl-2952 [001] ....... 1875.427249: tegra_channel_set_stream: ar0234 10-0014 : 0x0
v4l2-ctl-2952 [001] ....... 1875.427258: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x0
v4l2-ctl-2952 [001] ....... 1875.427260: csi_s_stream: enable : 0x0
v4l2-ctl-2952 [003] ....... 1875.430995: tegra_channel_set_power: ar0234 10-0014 : 0x0
v4l2-ctl-2952 [003] ....... 1875.431005: camera_common_s_power: status : 0x0
v4l2-ctl-2952 [003] ....... 1875.431183: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x0
v4l2-ctl-2952 [003] ....... 1875.431186: csi_s_power: enable : 0x0
v4l2-ctl-2958 [002] ....... 1876.547984: tegra_channel_open: vi-output, ar0234 10-0012
v4l2-ctl-2958 [002] ....... 1876.561335: tegra_channel_set_power: ar0234 10-0012 : 0x1
v4l2-ctl-2958 [002] ....... 1876.561409: camera_common_s_power: status : 0x1
v4l2-ctl-2958 [002] ....... 1876.561887: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2958 [002] ....... 1876.561888: csi_s_power: enable : 0x1
v4l2-ctl-2958 [002] ....... 1876.562186: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2959 [003] ....... 1876.562420: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1876.562428: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1876.562430: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1876.562431: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
v4l2-ctl-2958 [001] ....... 1876.562460: tegra_channel_set_stream: enable : 0x1
v4l2-ctl-2958 [001] ....... 1876.565551: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2958 [001] ....... 1876.565554: csi_s_stream: enable : 0x1
v4l2-ctl-2958 [002] ....... 1876.565654: tegra_channel_set_stream: ar0234 10-0012 : 0x1
vi-output, ar02-2960 [002] ....... 1879.267071: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2959 [003] ....... 1879.267188: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1879.267200: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1879.267201: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1879.267202: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2960 [003] ....... 1881.826467: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2959 [002] ....... 1881.826722: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [002] ....... 1881.826731: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [002] ....... 1881.826733: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [002] ....... 1881.826734: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2960 [003] ....... 1884.386192: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2959 [002] ....... 1884.386292: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [002] ....... 1884.386302: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [002] ....... 1884.386304: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [002] ....... 1884.386305: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
v4l2-ctl-2958 [002] ....... 1886.031194: tegra_channel_close: vi-output, ar0234 10-0012
vi-output, ar02-2960 [003] ....... 1886.914494: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
v4l2-ctl-2958 [002] ....... 1886.914769: tegra_channel_set_stream: enable : 0x0
v4l2-ctl-2958 [002] ....... 1886.914770: tegra_channel_set_stream: ar0234 10-0012 : 0x0
v4l2-ctl-2958 [002] ....... 1886.914779: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x0
v4l2-ctl-2958 [002] ....... 1886.914782: csi_s_stream: enable : 0x0
v4l2-ctl-2958 [002] ....... 1886.918008: tegra_channel_set_power: ar0234 10-0012 : 0x0
v4l2-ctl-2958 [002] ....... 1886.918017: camera_common_s_power: status : 0x0
v4l2-ctl-2958 [002] ....... 1886.918361: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x0
v4l2-ctl-2958 [002] ....... 1886.918363: csi_s_power: enable : 0x0
v4l2-ctl-2962 [001] ....... 1888.087923: tegra_channel_open: vi-output, ar0234 10-0010
v4l2-ctl-2962 [001] ....... 1888.102248: tegra_channel_set_power: ar0234 10-0010 : 0x1
v4l2-ctl-2962 [001] ....... 1888.102334: camera_common_s_power: status : 0x1
v4l2-ctl-2962 [001] ....... 1888.102793: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2962 [001] ....... 1888.102796: csi_s_power: enable : 0x1
v4l2-ctl-2962 [001] ....... 1888.103092: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2963 [002] ....... 1888.103536: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
vi-output, ar02-2963 [002] ....... 1888.103545: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
vi-output, ar02-2963 [002] ....... 1888.103547: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
vi-output, ar02-2963 [002] ....... 1888.103548: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
v4l2-ctl-2962 [000] ....... 1888.103571: tegra_channel_set_stream: enable : 0x1
v4l2-ctl-2962 [000] ....... 1888.105892: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2962 [000] ....... 1888.105896: csi_s_stream: enable : 0x1
v4l2-ctl-2962 [000] ....... 1888.106223: tegra_channel_set_stream: ar0234 10-0010 : 0x1
vi-output, ar02-2964 [000] ....... 1890.786065: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2963 [003] ....... 1890.786184: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
vi-output, ar02-2963 [003] ....... 1890.786192: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
vi-output, ar02-2963 [003] ....... 1890.786194: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
vi-output, ar02-2963 [003] ....... 1890.786195: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
root@tegra-ubuntu:~# cat /sys/kernel/debug/tracing/trace
# tracer: nop
#
# entries-in-buffer/entries-written: 116/116 #P:4
#
# _-------=> irqs-off
# / _------=> need-resched
# | / _-----=> need-resched-lazy
# || / _----=> hardirq/softirq
# ||| / _---=> preempt-depth
# |||| / _--=> preempt-lazy-depth
# ||||| / _-=> migrate-disable
# |||||| / delay
# TASK-PID CPU# ||||||| TIMESTAMP FUNCTION
# | | | ||||||| | |
v4l2-ctl-2952 [001] ....... 1867.730780: tegra_channel_open: vi-output, ar0234 10-0014
v4l2-ctl-2952 [001] ....... 1867.744179: tegra_channel_set_power: ar0234 10-0014 : 0x1
v4l2-ctl-2952 [001] ....... 1867.744256: camera_common_s_power: status : 0x1
v4l2-ctl-2952 [001] ....... 1867.745108: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2952 [001] ....... 1867.745110: csi_s_power: enable : 0x1
v4l2-ctl-2952 [001] ....... 1867.745622: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2953 [002] ....... 1867.755540: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1867.755550: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1867.755552: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1867.755554: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
v4l2-ctl-2952 [003] ....... 1867.755621: tegra_channel_set_stream: enable : 0x1
v4l2-ctl-2952 [003] ....... 1867.759160: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2952 [003] ....... 1867.759164: csi_s_stream: enable : 0x1
v4l2-ctl-2952 [003] ....... 1867.759813: tegra_channel_set_stream: ar0234 10-0014 : 0x1
vi-output, ar02-2954 [003] ....... 1870.307071: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2953 [002] ....... 1870.307186: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1870.307197: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1870.307199: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1870.307200: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2954 [003] ....... 1872.867080: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2953 [002] ....... 1872.867208: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1872.867221: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1872.867223: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
vi-output, ar02-2953 [002] ....... 1872.867225: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2953 tid:2953
v4l2-ctl-2952 [001] ....... 1873.011079: tegra_channel_close: vi-output, ar0234 10-0014
vi-output, ar02-2954 [003] ....... 1875.427136: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
v4l2-ctl-2952 [001] ....... 1875.427247: tegra_channel_set_stream: enable : 0x0
v4l2-ctl-2952 [001] ....... 1875.427249: tegra_channel_set_stream: ar0234 10-0014 : 0x0
v4l2-ctl-2952 [001] ....... 1875.427258: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x0
v4l2-ctl-2952 [001] ....... 1875.427260: csi_s_stream: enable : 0x0
v4l2-ctl-2952 [003] ....... 1875.430995: tegra_channel_set_power: ar0234 10-0014 : 0x0
v4l2-ctl-2952 [003] ....... 1875.431005: camera_common_s_power: status : 0x0
v4l2-ctl-2952 [003] ....... 1875.431183: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x0
v4l2-ctl-2952 [003] ....... 1875.431186: csi_s_power: enable : 0x0
v4l2-ctl-2958 [002] ....... 1876.547984: tegra_channel_open: vi-output, ar0234 10-0012
v4l2-ctl-2958 [002] ....... 1876.561335: tegra_channel_set_power: ar0234 10-0012 : 0x1
v4l2-ctl-2958 [002] ....... 1876.561409: camera_common_s_power: status : 0x1
v4l2-ctl-2958 [002] ....... 1876.561887: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2958 [002] ....... 1876.561888: csi_s_power: enable : 0x1
v4l2-ctl-2958 [002] ....... 1876.562186: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2959 [003] ....... 1876.562420: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1876.562428: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1876.562430: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1876.562431: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
v4l2-ctl-2958 [001] ....... 1876.562460: tegra_channel_set_stream: enable : 0x1
v4l2-ctl-2958 [001] ....... 1876.565551: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2958 [001] ....... 1876.565554: csi_s_stream: enable : 0x1
v4l2-ctl-2958 [002] ....... 1876.565654: tegra_channel_set_stream: ar0234 10-0012 : 0x1
vi-output, ar02-2960 [002] ....... 1879.267071: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2959 [003] ....... 1879.267188: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1879.267200: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1879.267201: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [003] ....... 1879.267202: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2960 [003] ....... 1881.826467: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2959 [002] ....... 1881.826722: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [002] ....... 1881.826731: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [002] ....... 1881.826733: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [002] ....... 1881.826734: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2960 [003] ....... 1884.386192: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2959 [002] ....... 1884.386292: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [002] ....... 1884.386302: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [002] ....... 1884.386304: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
vi-output, ar02-2959 [002] ....... 1884.386305: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2959 tid:2959
v4l2-ctl-2958 [002] ....... 1886.031194: tegra_channel_close: vi-output, ar0234 10-0012
vi-output, ar02-2960 [003] ....... 1886.914494: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
v4l2-ctl-2958 [002] ....... 1886.914769: tegra_channel_set_stream: enable : 0x0
v4l2-ctl-2958 [002] ....... 1886.914770: tegra_channel_set_stream: ar0234 10-0012 : 0x0
v4l2-ctl-2958 [002] ....... 1886.914779: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x0
v4l2-ctl-2958 [002] ....... 1886.914782: csi_s_stream: enable : 0x0
v4l2-ctl-2958 [002] ....... 1886.918008: tegra_channel_set_power: ar0234 10-0012 : 0x0
v4l2-ctl-2958 [002] ....... 1886.918017: camera_common_s_power: status : 0x0
v4l2-ctl-2958 [002] ....... 1886.918361: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x0
v4l2-ctl-2958 [002] ....... 1886.918363: csi_s_power: enable : 0x0
v4l2-ctl-2962 [001] ....... 1888.087923: tegra_channel_open: vi-output, ar0234 10-0010
v4l2-ctl-2962 [001] ....... 1888.102248: tegra_channel_set_power: ar0234 10-0010 : 0x1
v4l2-ctl-2962 [001] ....... 1888.102334: camera_common_s_power: status : 0x1
v4l2-ctl-2962 [001] ....... 1888.102793: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2962 [001] ....... 1888.102796: csi_s_power: enable : 0x1
v4l2-ctl-2962 [001] ....... 1888.103092: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2963 [002] ....... 1888.103536: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
vi-output, ar02-2963 [002] ....... 1888.103545: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
vi-output, ar02-2963 [002] ....... 1888.103547: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
vi-output, ar02-2963 [002] ....... 1888.103548: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
v4l2-ctl-2962 [000] ....... 1888.103571: tegra_channel_set_stream: enable : 0x1
v4l2-ctl-2962 [000] ....... 1888.105892: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2962 [000] ....... 1888.105896: csi_s_stream: enable : 0x1
v4l2-ctl-2962 [000] ....... 1888.106223: tegra_channel_set_stream: ar0234 10-0010 : 0x1
vi-output, ar02-2964 [000] ....... 1890.786065: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2963 [003] ....... 1890.786184: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
vi-output, ar02-2963 [003] ....... 1890.786192: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
vi-output, ar02-2963 [003] ....... 1890.786194: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
vi-output, ar02-2963 [003] ....... 1890.786195: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2963 tid:2963
v4l2-ctl-2962 [001] ....... 1893.136562: tegra_channel_close: vi-output, ar0234 10-0010
vi-output, ar02-2964 [003] ....... 1893.290076: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
v4l2-ctl-2962 [001] ....... 1893.290213: tegra_channel_set_stream: enable : 0x0
v4l2-ctl-2962 [001] ....... 1893.290215: tegra_channel_set_stream: ar0234 10-0010 : 0x0
v4l2-ctl-2962 [001] ....... 1893.290228: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x0
v4l2-ctl-2962 [001] ....... 1893.290230: csi_s_stream: enable : 0x0
v4l2-ctl-2962 [000] ....... 1893.292985: tegra_channel_set_power: ar0234 10-0010 : 0x0
v4l2-ctl-2962 [000] ....... 1893.292995: camera_common_s_power: status : 0x0
v4l2-ctl-2962 [000] ....... 1893.293190: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x0
v4l2-ctl-2962 [000] ....... 1893.293192: csi_s_power: enable : 0x0
v4l2-ctl-2967 [002] ....... 1894.960621: tegra_channel_open: vi-output, ar0234 10-0018
v4l2-ctl-2967 [002] ....... 1894.974135: tegra_channel_set_power: ar0234 10-0018 : 0x1
v4l2-ctl-2967 [002] ....... 1894.974209: camera_common_s_power: status : 0x1
v4l2-ctl-2967 [002] ....... 1894.974676: tegra_channel_set_power: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2967 [002] ....... 1894.974678: csi_s_power: enable : 0x1
v4l2-ctl-2967 [002] ....... 1894.974971: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt 13
vi-output, ar02-2968 [003] ....... 1894.975200: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2968 tid:2968
vi-output, ar02-2968 [003] ....... 1894.975209: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2968 tid:2968
vi-output, ar02-2968 [003] ....... 1894.975210: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2968 tid:2968
vi-output, ar02-2968 [003] ....... 1894.975212: vi_task_submit: class_id:48 ch:0 syncpt_id:34 syncpt_thresh:0 pid:2968 tid:2968
v4l2-ctl-2967 [001] ....... 1894.975241: tegra_channel_set_stream: enable : 0x1
v4l2-ctl-2967 [001] ....... 1894.977795: tegra_channel_set_stream: 13e00000.host1x:nvcsi@15a00000- : 0x1
v4l2-ctl-2967 [001] ....... 1894.977798: csi_s_stream: enable : 0x1
v4l2-ctl-2967 [002] ....... 1894.977907: tegra_channel_set_stream: ar0234 10-0018 : 0x1
4. 总结
- 我希望能正常抓到图像，请问上述流程哪里出现问题，非常感谢您的支持！！！
