Jetson Orin NX module PCIE EP mode on Custom Carrier board

Hello,

I am designing a custom carrier board for the Jetson Orin NX module intended for use as an EP device connected to an X86 host over a PCIE X4 link on C4 as EP @14160000. I have flashed the board using Jetpack R36.4 running Ubuntu 22.04. I have followed the instructions for building a custom carrier board configuration using this guide:
https://docs.nvidia.com/jetson/archives/r36.4/DeveloperGuide/HR/JetsonModuleAdaptationAndBringUp/JetsonOrinNxNanoSeries.html
and flashed the board using the following ODMDATA to enable PCIE C4 as EP mode.
ODMDATA=“gbe-uphy-config-9,hsstp-lane-map-3,hsio-uphy-config-40”
I am confident that the EP mode controller is online on the Jetson side from the DTS overlays since /sys/kernel/config/pci_ep/controllers/14160000.pcie-ep is there. However, one thing I would like to clarify for the Orin NX specifically is the bpmp config value located at /sys/kernel/debug/bpmp/debug/uphy/config is 0xa7a00000
I have only found this setting for checking EP mode on the AGX as 0x00D84000, can someone please confirm the correct value for the Orin NX in EP mode.

We are running through the hardware PCIe linkup checklist at the moment since our PCIE link is not displaying anything after loading the EPF driver. E.g.

For Orin NX/Nano, configure PCIE_EP_ADDR to correspond with the C4 controller:

PCIE_EP_ADDR=14160000

modprobe pci-epf-dma-test

cd /sys/kernel/config/pci_ep/

mkdir functions/tegra_pcie_dma_epf/func1

echo 0x10de > functions/tegra_pcie_dma_epf/func1/vendorid

echo 0x229a > functions/tegra_pcie_dma_epf/func1/deviceid

echo 16 > functions/tegra_pcie_dma_epf/func1/msi_interrupts

ln -s functions/tegra_pcie_dma_epf/func1 controllers/${PCIE_EP_ADDR}.pcie-ep/

echo 1 > controllers/${PCIE_EP_ADDR}.pcie-ep/start

I can see in dmesg only this even after rebooting the RP device and nothing else
tegra194-pcie 14160000.pcie-ep: iATU unroll: enabled
tegra194-pcie 14160000.pcie-ep: Detected iATU regions: 8 outbound, 2 inbound
pcie_dma_epf_tegra_pcie_dma_epf.0: BAR0 phy_addr: f0000000 size: 10000000

after configuring some of the channel parameters:
echo 16777216 > dma_size
echo 4 > nents
echo 1000 > stress_count
echo 0x11 > edma_ch

I see this error in dmesg
pcie_dma_epf_tegra_pcie_dma_epf.0: RP DMA address is null

I note on the Jetson Orin NX Product Design Guide it states for PCIE0_CLK_N/P that “PCIe 0 Reference Clock+ controlled by on-module mux by SoC GP21. When GP21 is low, SF_PCIE4_CLK is selected (reference clock when module is Root Port). When GP21 is high, HS_UPHY0_REFCLK2_IN is selected (reference clock input when module is an Endpoint).”
My question is, how can I enable or confirm that GP21 is high? I cannot find any references to this in any data sheet or user guide or technical refernece manual for the Jetson Orin NX.

Thanks

We don’t support the refclk from EP directly in software. It has to be from RP side.

You could check the status of any GPIO from /sys/kernel/debug/gpio

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