Hello,
We are developing a custom CPU board and have connected a Jetson Orin NX/NANO module to it as a PCIe Endpoint. However, the CPU board is unable to detect the Jetson.
After executing the following command on the Jetson side:
# echo 1 > controllers/14160000.pcie_ep/start
and performing a hardware reset only on the CPU board, the CPU board is then able to recognize the Jetson.
From this behavior, is it correct to assume that Jetson does not respond to Link Training unless Linux has booted and the above command has been executed?
For reference, we are using JetPack 5.1.2.
Thank you for your support.
Hi,
Better reading the document first to make sure the connection between Orin and your CPU board really follows the design.
Thank you for your reply.
Based on your response, is it correct to assume that there is a high possibility that there is an issue with the connection between the CPU and the Jetson?
If there are no issues at all, how long does it usually take for the Jetson to be able to respond to link training from the CPU?
Yes, hardware connection problem.
Thank you for your response.
Yes, hardware connection problem.
OK. I will check on that.
By the way, there aren’t any constraints regarding the startup timing of the CPU board and the Jetson, right?
For example, is it necessary for the CPU board to start only after Jetson Linux has booted?
I appreciate your support.
Please boot up the RP side after Jetson EP is booted.
What kind of issues might occur if the RP side and the EP side are powered on at the same time?
I appreciate your support.
It is just RP side won’t detect the EP.
Thanks for the quick reply.
In that case, will the RP side be able to detect the EP side by performing retraining afterward?
If your RP is able to bind and rebind the driver again, then retrain might happen.
Just to clarify that this is up to how your RP side PCIe driver implementation.