Hi NVIDIA Team,
We are bringing up a custom carrier board for the Jetson Thor module using JetPack 7.1
We have successfully flashed the device with A/B redundancy enabled, but we are facing an issue where A/B slot switching fails to persist after a reboot.
1. Issue Description
Currently, the system is booted into Slot B.
When we run:
sudo nvbootctrl -t rootfs set-active-boot-slot 0
sudo nvbootctrl -t bootloader set-active-boot-slot 0
The command executes successfully without any errors. However, after executing sudo reboot, the system still boots back into Slot B (Slot 1). The active slot setting is completely lost/ignored.
2. Custom Board Configuration (No EEPROM)
Our custom carrier board is designed without an EEPROM. Following the adaptation guide, we made these changes:
-
Modified
tegra264-mb2-bct-common.dtsi:
- cvb_eeprom_read_size = <0x100>
+ cvb_eeprom_read_size = <0x0> -
Added
SKIP_EEPROM_CHECK=1in our board configuration file (p3834-0008-p4071-0000-nvme.conf).
Flashing Command Used:
sudo ROOTFS_AB=1 ./l4t_initrd_flash.sh \
--external-device nvme0n1 \
-c ./tools/kernel_flash/flash_l4t_t264_nvme_rootfs_ab.xml \
jetson-agx-thor-devkit internal
3. Cross-Validation (Crucial)
To isolate the issue, we flashed the official NVIDIA Thor Developer Kit using the exact same BSP, kernel, device tree, and flashing command.
-
On the DevKit: A/B slot switching works perfectly.
-
On our Custom Board: Stuck in Slot B.
This indicates our software ecosystem and OTA logic are correct, and the issue highly points to hardware design differences or low-level Bootloader behavior specific to our custom board.
4. Bootloader Logs (MB1 Stage)
We captured the serial logs during boot. There are no crash/fallback errors (BR last_boot_error0: 0x0), but the BootROM decides to boot from Slot 1 extremely early:
[0000.091] I> MB1 (version: 0.23.0.2-t264-75019003-378e427f)
[0000.092] C> Boot-mode : Coldboot
[0000.092] C> MB1 last_boot_error: 0x0
...
[0000.111] I> BR last_boot_error0: 0x0
...
[0000.323] I> Boot_device: QSPI_FLASH instance: 0
[0000.345] I> QSPI-0l initialized successfully
[0000.354] C> RAM_CODE 0xc
[0000.356] I> Loading MEMBCT
[0000.359] I> Slot: 1 <-- It forces Slot 1 (B) very early
[0000.361] I> Binary [6] block-66304 (partition size: 0x60000)
...
[0000.620] I> Sku value zero. Using platform data in MB1 BCT
...
he complete bootloader phase log is attached below
007_boot_log_02.txt (98.1 KB)
5. Our Questions:
Since the OS level nvbootctrl command shows success but does not survive a reboot, we suspect the UEFI variables / SMD data are not being correctly flushed to the QSPI Flash on our custom board.
-
Could missing hardware strapping pins (e.g., QSPI WP/Write Protect pin state) cause
nvbootctrlto fail silently when writing to the SMD partition? Which specific pins should we check on the Thor module? -
Does the absence of the carrier board EEPROM trigger any deep fallback mechanism in UEFI/MB1 that locks the active slot to a “safe” partition, even with
SKIP_EEPROM_CHECK=1enabled? -
Are there any specific commands we can use to verify if the physical write to the QSPI SMD partition is actually happening?
Any guidance on troubleshooting this custom carrier board issue would be greatly appreciated. Thanks!