Jetson-TK1 CSI-2 data lane configuration

I am going to connect a CSI-2 4 lane camera to the Jetson-TK1. But I’m not sure which camera data-lane should connect to which pin of Tegra K1.

Is there any constraint for CSI-2 pin assignment on Jetson-TK1? Or is the pin assignment configurable?

The CSI-2 camera has 4 data lanes and 1 clock lane as data0, data1, data2, data3, clk.
The following pins can be used for CSI-2 camera.

J3A2 connector    Camera port
CSI_A_D0_P/N  --> for data0?
CSI_A_D1_P/N  --> for data1?
CSI_A_CLK_P/N --> for clk?
CSI_B_D0_P/N  --> for data2?
CSI_B_D1_P/N  --> for data3?


I myself have this question.

I’ll be grateful if you share any advances you have on connecting a camera through the CSI interface. I’ll do it too if I get any news.


Which CSI-2 4-lane camera are you using - just wondering.

John W.


To John,
Sorry, I can not mention the camera.

Anyway, let me ask again about CSI-2 data lane configuration.

The signal names, described in two documents “schematic of Jetson-TK1” and “Technical Reference Manual (TRM)”, do not match.
In the schematic the following signals are defined:

  • CSI_A_D0_N/P
  • CSI_A_D1_N/P
  • CSI_B_D0_N/P
  • CSI_B_D1_N/P
  • CSI_E_D0_N/P

The CSI_A_D[1:0] and CSI_B_D[1:0] could be a 4-Lane data signals, I think.

TRM describes, however,

  • Camera A is assigned to DSI & CSI x4 Pins (shared)
  • Camera B is assigned to CSI x4 Pins
  • Camera C is assigned to CSI x1 Pins

I think that “Camera B” might be CSI_A_D[1:0] and CSI_B_D[1:0], and “Camera C” might be CSI_E_D0.
Is my understanding correct?

And… How do I configure data lane of CSI-2 4-lane for Jetson TK1 connector?


Hi Tomoyuki,

did you have any success yet?

Your assumption that CSI_A_D[1:0] and CSI_B_D[1:0] are the 4-Lane data signals sounds very reasonable, but I would prefer verifying it somewhere before making a headboard.

Maybe you already had success and could share some of your insight.

Best regards!

Could somebody from Nvidia who designed these two documents please comment on this. It would be very helpful. Thanks.

Hi Tomoyuki,

This is the pin mapping required.

J3A2 → your 4 data lanes camera B

CSI_A_D[0]_N/P → DATA[0]_N/P
CSI_A_D[1]_N/P → DATA[1]_N/P
CSI_B_D[0]_N/P → DATA[2]_N/P
CSI_B_D[1]_N/P → DATA[3]_N/P

CSI_E_D0_N/P & CSI_E_CLK_N/P on J3A2 is for additional 1 data lane Camera C connection.

Jetson TK1 board does not support connecting 4 data lanes Camera A since the following ball names are not connected with any of expansion I/O connectors in the schematic.

There’s no TP(Test Point) available for direct wiring from the board either.


How is the CSI function on Jetson-TK1??
I look, no CSI cameras are currently supported.
But in Jetson/Cameras -,
It show MIPI-CSI2 has been tested on Jetson-TK1.
I’m not sure the current situation for CSI function.

I wanna test a CSI 4 lane camera recently, are there more CSI control documents or porting information about CSI?

I got a similar problem with assigning 3 cameras with each 4 MIPI lanes to the Jetson Nano Board.

Anybody could come up with pin assignment to the J509 connector.