I have a CycloneV FPGA connected to the Jetson TX1 with PCIe bus. A memory range (64MiB) of the CycloneV memory is mapped through the PCIe bus, which is accessible from the Jetson.
My application writes data from Jetson to the mapped memory. I found that sometimes the data transfer is delayed: the maximum measured delay was ~0.3 second.
How can I flush this memory, or make sure all the pending transactions have been completed? I tried to use fsync() and msync() without success.
I use Linux kernel 3.10.96 on the Jetson.