Jetson TX1 with 1-lane camera

I’m working on developing a 1-lane camera driver. The camera OV5693 which is on the reference board supports 1-data-lane mode,so I changed the board file and the register(0x3011) in OV5693:

static struct i2c_board_info t210ref_ov5693_e3326_camera_i2c_device = {
	I2C_BOARD_INFO("ov5693_v4l2", 0x36),

static struct tegra_camera_platform_data
t210ref_ov5693_e3326_camera_platform_data = {
	.flip_v			= 0,
	.flip_h			= 0,
	.lanes			= 1,
	.continuous_clk		= 0,

static struct soc_camera_link ov5693_e3326_iclink = {
	.bus_id		= 0, /* This must match the .id of tegra_vi01_device */
	.board_info	= &t210ref_ov5693_e3326_camera_i2c_device,
	.module_name	= "ov5693_v4l2",
	.i2c_adapter_id	= 6, /* VI2 I2C controller */
	.power		= t210ref_ov5693_power,
	.priv		= &t210ref_ov5693_e3326_camera_platform_data,
	.dev_priv	= &t210ref_ov5693_e3326_data,
static const ov5693_reg mode_1920x1080[] = {
	{0x0100, 0x00},/*, 0xIncluding, 0xsw, 0xreset, 0x*/
	{0x3001, 0x0a},
	{0x3002, 0x80},
	{0x3006, 0x00},
	{0x3011, 0x11},
	{0x3012, 0x09},
	{0x3013, 0x10},
	{0x3014, 0x00},
	{0x3015, 0x08},
	{0x3016, 0xf0},

I’ve got a syncpoint timeout and a incomplete image.

The V4L User guide says:

Sync point timeout without error
This means Tegra VI/CSI does not receive any data but no error occurs. Verify that the sensor is powered on and streaming data correctly before debugging the Tegra driver.
Change settle time value to see if there if some error shows up. These registers must be configured with the right values to get data from the sensor.
cil_regs_write(vi2_cam, chan, TEGRA_CSI_CIL_PHY_CONTROL, 0xA);

I’ve changed it from 0 to 0xf,and it doesn’t work.

Thanks a lot!

You have to get one lane setting from Omnivision. I think there still have others REG need to modify like PLL or some other else. It’s better get the new sensor mode reg setting for one lane from Omnivision.

It’s right. I’ve changed a sensor and solved this problem.
Thank you very much.