Jetson TX2 Power Button Event Not working

Is there any way to load SGTL5000 driver without I2C device?

If you have an SGTL5000 device, use it to reproduce the issue.
But, if you don’t have an SGTL5000 device, you can use another I2C device to load the SGTL5000 driver to reproduce the issue.

Hi larche,

That is what I was checking in previous comment. I want to know whether any extra hardware is needed. No matter a eeprom on i2c or sgtl 5000.

I was misled by the term “load the driver” here. I thought it would hit this issue right after the driver is loading no matter the result is successful or not. But turns out it must reproduce with successful probe. Then maybe I cannot help on my side.

Please do share the userspace log and dmesg. The userspace log (Xorg.0.log/syslog) may help to firstly diagnose if any error happens after you click the button.

Hi larche,

We are able to reproduce this issue with another device. Still under investigation.

Hi,

Could you share the result of

$ sudo cat /sys/kernel/debug/tegra_pinctrl_reg

Hello

JetPack v4.3 Original Pinctrl Log

Bank: 1 Reg: 0x0c302000 Val: 0x00000400 -> touch_clk_pee2
Bank: 1 Reg: 0x0c302008 Val: 0x00000458 -> uart3_cts_pw5
Bank: 1 Reg: 0x0c302010 Val: 0x00000400 -> uart3_rts_pw4
Bank: 1 Reg: 0x0c302018 Val: 0x00000458 -> uart3_rx_pw3
Bank: 1 Reg: 0x0c302020 Val: 0x00000400 -> uart3_tx_pw2
Bank: 1 Reg: 0x0c302028 Val: 0x00001440 -> gen8_i2c_sda_pw1
Bank: 1 Reg: 0x0c302030 Val: 0x00001440 -> gen8_i2c_scl_pw0
Bank: 1 Reg: 0x0c302038 Val: 0x00000458 -> uart7_rx_pw7
Bank: 1 Reg: 0x0c302040 Val: 0x00000400 -> uart7_tx_pw6
Bank: 1 Reg: 0x0c302048 Val: 0x00000058 -> gpio_sen0_pv0
Bank: 1 Reg: 0x0c302050 Val: 0x00000400 -> gpio_sen1_pv1
Bank: 1 Reg: 0x0c302058 Val: 0x00000454 -> gpio_sen2_pv2
Bank: 1 Reg: 0x0c302060 Val: 0x00000400 -> gpio_sen3_pv3
Bank: 1 Reg: 0x0c302068 Val: 0x00000408 -> gpio_sen4_pv4
Bank: 1 Reg: 0x0c302070 Val: 0x00000000 -> gpio_sen5_pv5
Bank: 1 Reg: 0x0c302078 Val: 0x00000401 -> gpio_sen6_pv6
Bank: 1 Reg: 0x0c302080 Val: 0x00000401 -> gpio_sen7_pv7
Bank: 1 Reg: 0x0c302088 Val: 0x00001441 -> gpio_sen8_pee0
Bank: 1 Reg: 0x0c302090 Val: 0x00001441 -> gpio_sen9_pee1
Bank: 1 Reg: 0x0c303000 Val: 0x00000050 -> can_gpio7_paa7
Bank: 1 Reg: 0x0c303008 Val: 0x00000400 -> can1_dout_pz0
Bank: 1 Reg: 0x0c303010 Val: 0x00000458 -> can1_din_pz1
Bank: 1 Reg: 0x0c303018 Val: 0x00000400 -> can0_dout_pz2
Bank: 1 Reg: 0x0c303020 Val: 0x00000458 -> can0_din_pz3
Bank: 1 Reg: 0x0c303028 Val: 0x00006054 -> can_gpio0_paa0
Bank: 1 Reg: 0x0c303030 Val: 0x00006054 -> can_gpio1_paa1
Bank: 1 Reg: 0x0c303038 Val: 0x00000059 -> can_gpio2_paa2
Bank: 1 Reg: 0x0c303040 Val: 0x00000040 -> can_gpio3_paa3
Bank: 1 Reg: 0x0c303048 Val: 0x00000058 -> can_gpio4_paa4
Bank: 1 Reg: 0x0c303050 Val: 0x00000040 -> can_gpio5_paa5
Bank: 1 Reg: 0x0c303058 Val: 0x00000000 -> can_gpio6_paa6
Bank: 0 Reg: 0x02431000 Val: 0x00000401 -> gpio_aud3_pk0
Bank: 0 Reg: 0x02431008 Val: 0x00000401 -> gpio_aud2_pj7
Bank: 0 Reg: 0x02431010 Val: 0x00000058 -> gpio_aud1_pj6
Bank: 0 Reg: 0x02431018 Val: 0x00000054 -> gpio_aud0_pj5
Bank: 0 Reg: 0x02431020 Val: 0x00000059 -> aud_mclk_pj4
Bank: 0 Reg: 0x02431028 Val: 0x00000055 -> dap1_fs_pj3
Bank: 0 Reg: 0x02431030 Val: 0x00000055 -> dap1_din_pj2
Bank: 0 Reg: 0x02431038 Val: 0x00000055 -> dap1_dout_pj1
Bank: 0 Reg: 0x02431040 Val: 0x00000055 -> dap1_sclk_pj0
Bank: 0 Reg: 0x02432000 Val: 0x00006441 -> dmic1_clk_pm1
Bank: 0 Reg: 0x02432008 Val: 0x00006459 -> dmic1_dat_pm0
Bank: 0 Reg: 0x02432010 Val: 0x00006441 -> dmic2_dat_pm2
Bank: 0 Reg: 0x02432018 Val: 0x00006401 -> dmic2_clk_pm3
Bank: 0 Reg: 0x02432020 Val: 0x00006002 -> dmic4_dat_pm4
Bank: 0 Reg: 0x02432028 Val: 0x0000605a -> dmic4_clk_pm5
Bank: 0 Reg: 0x02432030 Val: 0x00006440 -> dap4_fs_pcc3
Bank: 0 Reg: 0x02432038 Val: 0x00006458 -> dap4_din_pcc2
Bank: 0 Reg: 0x02432040 Val: 0x00006400 -> dap4_dout_pcc1
Bank: 0 Reg: 0x02432048 Val: 0x00006440 -> dap4_sclk_pcc0
Bank: 0 Reg: 0x02430000 Val: 0x00000400 -> extperiph2_clk_po1
Bank: 0 Reg: 0x02430008 Val: 0x00000400 -> extperiph1_clk_po0
Bank: 0 Reg: 0x02430010 Val: 0x00001440 -> cam_i2c_sda_po3
Bank: 0 Reg: 0x02430018 Val: 0x00001440 -> cam_i2c_scl_po2
Bank: 0 Reg: 0x02430020 Val: 0x00000001 -> gpio_cam1_pn0
Bank: 0 Reg: 0x02430028 Val: 0x00000401 -> gpio_cam2_pn1
Bank: 0 Reg: 0x02430030 Val: 0x00000002 -> gpio_cam3_pn2
Bank: 0 Reg: 0x02430038 Val: 0x00000056 -> gpio_cam4_pn3
Bank: 0 Reg: 0x02430040 Val: 0x00000056 -> gpio_cam5_pn4
Bank: 0 Reg: 0x02430048 Val: 0x00000056 -> gpio_cam6_pn5
Bank: 0 Reg: 0x02430050 Val: 0x00000058 -> gpio_cam7_pn6
Bank: 0 Reg: 0x02434000 Val: 0x00000458 -> dap2_din_pc3
Bank: 0 Reg: 0x02434008 Val: 0x00000400 -> dap2_dout_pc2
Bank: 0 Reg: 0x02434010 Val: 0x00000440 -> dap2_fs_pc4
Bank: 0 Reg: 0x02434018 Val: 0x00000440 -> dap2_sclk_pc1
Bank: 0 Reg: 0x02434020 Val: 0x00000458 -> uart4_cts_pb3
Bank: 0 Reg: 0x02434028 Val: 0x00000400 -> uart4_rts_pb2
Bank: 0 Reg: 0x02434030 Val: 0x00000458 -> uart4_rx_pb1
Bank: 0 Reg: 0x02434038 Val: 0x00000400 -> uart4_tx_pb0
Bank: 0 Reg: 0x02434040 Val: 0x00000058 -> gpio_wan4_pc0
Bank: 0 Reg: 0x02434048 Val: 0x00000000 -> gpio_wan3_pb6
Bank: 0 Reg: 0x02434050 Val: 0x00000058 -> gpio_wan2_pb5
Bank: 0 Reg: 0x02434058 Val: 0x00000000 -> gpio_wan1_pb4
Bank: 0 Reg: 0x02434060 Val: 0x00001460 -> gen1_i2c_scl_pc5
Bank: 0 Reg: 0x02434068 Val: 0x00001460 -> gen1_i2c_sda_pc6
Bank: 0 Reg: 0x02435000 Val: 0x00000055 -> uart1_cts_pt3
Bank: 0 Reg: 0x02435008 Val: 0x00000055 -> uart1_rts_pt2
Bank: 0 Reg: 0x02435010 Val: 0x00000458 -> uart1_rx_pt1
Bank: 0 Reg: 0x02435018 Val: 0x00000400 -> uart1_tx_pt0
Bank: 0 Reg: 0x02435028 Val: 0x00022448 -> directdc1_out3_pq5
Bank: 0 Reg: 0x02435030 Val: 0x00022448 -> directdc1_out2_pq4
Bank: 0 Reg: 0x02435038 Val: 0x00022448 -> directdc1_out1_pq3
Bank: 0 Reg: 0x02435040 Val: 0x00022448 -> directdc1_out0_pq2
Bank: 0 Reg: 0x02435048 Val: 0x00022444 -> directdc1_in_pq1
Bank: 0 Reg: 0x02435050 Val: 0x00022448 -> directdc1_clk_pq0
Bank: 0 Reg: 0x02435058 Val: 0x00002000 -> directdc_comp
Bank: 0 Reg: 0x02433000 Val: 0x00006406 -> gpio_pq0_pi0
Bank: 0 Reg: 0x02433008 Val: 0x00006406 -> gpio_pq1_pi1
Bank: 0 Reg: 0x02433010 Val: 0x00006456 -> gpio_pq2_pi2
Bank: 0 Reg: 0x02433018 Val: 0x00006406 -> gpio_pq3_pi3
Bank: 0 Reg: 0x02433020 Val: 0x00004054 -> gpio_pq4_pi4
Bank: 0 Reg: 0x02433028 Val: 0x00004054 -> gpio_pq5_pi5
Bank: 0 Reg: 0x02433030 Val: 0x00004058 -> gpio_pq6_pi6
Bank: 0 Reg: 0x02433038 Val: 0x00004054 -> gpio_pq7_pi7
Bank: 0 Reg: 0x02440000 Val: 0x00000058 -> gpio_edp2_pp5
Bank: 0 Reg: 0x02440008 Val: 0x00000000 -> gpio_edp3_pp6
Bank: 0 Reg: 0x02440010 Val: 0x00000000 -> gpio_edp0_pp3
Bank: 0 Reg: 0x02440018 Val: 0x00000058 -> gpio_edp1_pp4
Bank: 0 Reg: 0x02440020 Val: 0x00000450 -> dp_aux_ch0_hpd_pp0
Bank: 0 Reg: 0x02440028 Val: 0x00000051 -> dp_aux_ch1_hpd_pp1
Bank: 0 Reg: 0x02440030 Val: 0x00000460 -> hdmi_cec_pp2
Bank: 0 Reg: 0x02437000 Val: 0x00000460 -> pex_l2_clkreq_n_pa6
Bank: 0 Reg: 0x02437008 Val: 0x00000470 -> pex_wake_n_pa2
Bank: 0 Reg: 0x02437010 Val: 0x00000460 -> pex_l1_clkreq_n_pa4
Bank: 0 Reg: 0x02437018 Val: 0x00000420 -> pex_l1_rst_n_pa3
Bank: 0 Reg: 0x02437020 Val: 0x00000460 -> pex_l0_clkreq_n_pa1
Bank: 0 Reg: 0x02437028 Val: 0x00000420 -> pex_l0_rst_n_pa0
Bank: 0 Reg: 0x02437030 Val: 0x00000420 -> pex_l2_rst_n_pa5
Bank: 0 Reg: 0x02438000 Val: 0x00002460 -> sdmmc1_clk_pd0
Bank: 0 Reg: 0x02438008 Val: 0x00002448 -> sdmmc1_cmd_pd1
Bank: 0 Reg: 0x02438010 Val: 0x00000000 -> sdmmc1_comp
Bank: 0 Reg: 0x02438014 Val: 0x00002448 -> sdmmc1_dat3_pd5
Bank: 0 Reg: 0x0243801c Val: 0x00002448 -> sdmmc1_dat2_pd4
Bank: 0 Reg: 0x02438024 Val: 0x00002448 -> sdmmc1_dat1_pd3
Bank: 0 Reg: 0x0243802c Val: 0x00002448 -> sdmmc1_dat0_pd2
Bank: 0 Reg: 0x02439000 Val: 0x00002400 -> eqos_td3_pe4
Bank: 0 Reg: 0x02439008 Val: 0x00002400 -> eqos_td2_pe3
Bank: 0 Reg: 0x02439010 Val: 0x00002400 -> eqos_td1_pe2
Bank: 0 Reg: 0x02439018 Val: 0x00002400 -> eqos_td0_pe1
Bank: 0 Reg: 0x02439020 Val: 0x00002450 -> eqos_rd3_pf1
Bank: 0 Reg: 0x02439028 Val: 0x00002450 -> eqos_rd2_pf0
Bank: 0 Reg: 0x02439030 Val: 0x00002450 -> eqos_rd1_pe7
Bank: 0 Reg: 0x02439038 Val: 0x00002448 -> eqos_mdio_pf4
Bank: 0 Reg: 0x02439040 Val: 0x00002450 -> eqos_rd0_pe6
Bank: 0 Reg: 0x02439048 Val: 0x00002400 -> eqos_mdc_pf5
Bank: 0 Reg: 0x02439050 Val: 0x00000000 -> eqos_comp
Bank: 0 Reg: 0x02439054 Val: 0x00002400 -> eqos_txc_pe0
Bank: 0 Reg: 0x0243905c Val: 0x00002450 -> eqos_rxc_pf3
Bank: 0 Reg: 0x02439064 Val: 0x00002400 -> eqos_tx_ctl_pe5
Bank: 0 Reg: 0x0243906c Val: 0x00002450 -> eqos_rx_ctl_pf2
Bank: 0 Reg: 0x0243a000 Val: 0x00002448 -> sdmmc3_dat3_pg5
Bank: 0 Reg: 0x0243a008 Val: 0x00002448 -> sdmmc3_dat2_pg4
Bank: 0 Reg: 0x0243a010 Val: 0x00002448 -> sdmmc3_dat1_pg3
Bank: 0 Reg: 0x0243a018 Val: 0x00002448 -> sdmmc3_dat0_pg2
Bank: 0 Reg: 0x0243a020 Val: 0x00000000 -> sdmmc3_comp
Bank: 0 Reg: 0x0243a024 Val: 0x00002448 -> sdmmc3_cmd_pg1
Bank: 0 Reg: 0x0243a02c Val: 0x00002460 -> sdmmc3_clk_pg0
Bank: 0 Reg: 0x02436004 Val: 0x00002060 -> sdmmc4_clk
Bank: 0 Reg: 0x02436008 Val: 0x00002048 -> sdmmc4_cmd
Bank: 0 Reg: 0x0243600c Val: 0x00002040 -> sdmmc4_dqs
Bank: 0 Reg: 0x02436010 Val: 0x00002048 -> sdmmc4_dat7
Bank: 0 Reg: 0x02436014 Val: 0x00002048 -> sdmmc4_dat6
Bank: 0 Reg: 0x02436018 Val: 0x00002048 -> sdmmc4_dat5
Bank: 0 Reg: 0x0243601c Val: 0x00002048 -> sdmmc4_dat4
Bank: 0 Reg: 0x02436020 Val: 0x00002048 -> sdmmc4_dat3
Bank: 0 Reg: 0x02436024 Val: 0x00002048 -> sdmmc4_dat2
Bank: 0 Reg: 0x02436028 Val: 0x00002048 -> sdmmc4_dat1
Bank: 0 Reg: 0x0243602c Val: 0x00002048 -> sdmmc4_dat0
Bank: 0 Reg: 0x0243b000 Val: 0x00000001 -> qspi_io3_pr4
Bank: 0 Reg: 0x0243b008 Val: 0x00000001 -> qspi_io2_pr3
Bank: 0 Reg: 0x0243b010 Val: 0x00000001 -> qspi_io1_pr2
Bank: 0 Reg: 0x0243b018 Val: 0x00000001 -> qspi_io0_pr1
Bank: 0 Reg: 0x0243b020 Val: 0x00000001 -> qspi_sck_pr0
Bank: 0 Reg: 0x0243b028 Val: 0x00000049 -> qspi_cs_n_pr5
Bank: 0 Reg: 0x0243b030 Val: 0x00002000 -> qspi_comp
Bank: 1 Reg: 0x0c301000 Val: 0x00000058 -> gpio_sw1_pff1
Bank: 1 Reg: 0x0c301008 Val: 0x00000058 -> gpio_sw2_pff2
Bank: 1 Reg: 0x0c301010 Val: 0x00000058 -> gpio_sw3_pff3
Bank: 1 Reg: 0x0c301018 Val: 0x00000058 -> gpio_sw4_pff4
Bank: 1 Reg: 0x0c301020 Val: 0x00000040 -> shutdown
Bank: 1 Reg: 0x0c301028 Val: 0x00000040 -> pmu_int
Bank: 1 Reg: 0x0c301030 Val: 0x00000001 -> safe_state_ps3
Bank: 1 Reg: 0x0c301038 Val: 0x00000450 -> vcomp_alert_ps4
Bank: 1 Reg: 0x0c301040 Val: 0x00000040 -> soc_pwr_req
Bank: 1 Reg: 0x0c301048 Val: 0x00000458 -> batt_oc_ps2
Bank: 1 Reg: 0x0c301050 Val: 0x00001040 -> clk_32k_in
Bank: 1 Reg: 0x0c301058 Val: 0x00000058 -> power_on_pff0
Bank: 1 Reg: 0x0c301060 Val: 0x00001440 -> pwr_i2c_scl_ps0
Bank: 1 Reg: 0x0c301068 Val: 0x00001440 -> pwr_i2c_sda_ps1
Bank: 1 Reg: 0x0c301080 Val: 0x00000401 -> gpio_dis0_pu0
Bank: 1 Reg: 0x0c301088 Val: 0x0000045a -> gpio_dis1_pu1
Bank: 1 Reg: 0x0c301090 Val: 0x00000402 -> gpio_dis2_pu2
Bank: 1 Reg: 0x0c301098 Val: 0x00000000 -> gpio_dis3_pu3
Bank: 1 Reg: 0x0c3010a0 Val: 0x00000402 -> gpio_dis4_pu4
Bank: 1 Reg: 0x0c3010a8 Val: 0x00000401 -> gpio_dis5_pu5
Bank: 0 Reg: 0x0243d000 Val: 0x0000040a -> gpio_wan8_ph3
Bank: 0 Reg: 0x0243d008 Val: 0x00000402 -> gpio_wan7_ph2
Bank: 0 Reg: 0x0243d010 Val: 0x00000456 -> gpio_wan6_ph1
Bank: 0 Reg: 0x0243d018 Val: 0x00000402 -> gpio_wan5_ph0
Bank: 0 Reg: 0x0243d020 Val: 0x00000400 -> uart2_tx_px0
Bank: 0 Reg: 0x0243d028 Val: 0x00000458 -> uart2_rx_px1
Bank: 0 Reg: 0x0243d030 Val: 0x00000400 -> uart2_rts_px2
Bank: 0 Reg: 0x0243d038 Val: 0x00000458 -> uart2_cts_px3
Bank: 0 Reg: 0x0243d040 Val: 0x00000402 -> uart5_rx_px5
Bank: 0 Reg: 0x0243d048 Val: 0x00000452 -> uart5_tx_px4
Bank: 0 Reg: 0x0243d050 Val: 0x00000002 -> uart5_rts_px6
Bank: 0 Reg: 0x0243d058 Val: 0x0000005a -> uart5_cts_px7
Bank: 0 Reg: 0x0243d060 Val: 0x00000058 -> gpio_mdm1_py0
Bank: 0 Reg: 0x0243d068 Val: 0x00000054 -> gpio_mdm2_py1
Bank: 0 Reg: 0x0243d070 Val: 0x00000058 -> gpio_mdm3_py2
Bank: 0 Reg: 0x0243d078 Val: 0x00000409 -> gpio_mdm4_py3
Bank: 0 Reg: 0x0243d080 Val: 0x00000000 -> gpio_mdm5_py4
Bank: 0 Reg: 0x0243d088 Val: 0x00000059 -> gpio_mdm6_py5
Bank: 0 Reg: 0x0243d090 Val: 0x00000058 -> gpio_mdm7_py6
Bank: 0 Reg: 0x0243d098 Val: 0x00000000 -> bcpu_pwr_req_ph4
Bank: 0 Reg: 0x0243d0a0 Val: 0x00000000 -> mcpu_pwr_req_ph5
Bank: 0 Reg: 0x0243d0a8 Val: 0x00000000 -> gpu_pwr_req_ph6
Bank: 0 Reg: 0x0243d0b0 Val: 0x00001440 -> gen7_i2c_scl_pl0
Bank: 0 Reg: 0x0243d0b8 Val: 0x00001440 -> gen7_i2c_sda_pl1
Bank: 0 Reg: 0x0243d0c0 Val: 0x00001440 -> gen9_i2c_sda_pl3
Bank: 0 Reg: 0x0243d0c8 Val: 0x00001440 -> gen9_i2c_scl_pl2
Bank: 0 Reg: 0x0243d0d0 Val: 0x00000460 -> usb_vbus_en0_pl4
Bank: 0 Reg: 0x0243d0d8 Val: 0x00000470 -> usb_vbus_en1_pl5
Bank: 0 Reg: 0x0243d0e0 Val: 0x00000400 -> gp_pwm7_pl7
Bank: 0 Reg: 0x0243d0e8 Val: 0x00000400 -> gp_pwm6_pl6
Bank: 0 Reg: 0x02441000 Val: 0x00022001 -> ufs0_rst_pbb1
Bank: 0 Reg: 0x02441008 Val: 0x00022001 -> ufs0_ref_clk_pbb0

SGTL5000 Enable Pinctrl Log

Bank: 1 Reg: 0x0c302000 Val: 0x00000400 -> touch_clk_pee2
Bank: 1 Reg: 0x0c302008 Val: 0x00000458 -> uart3_cts_pw5
Bank: 1 Reg: 0x0c302010 Val: 0x00000400 -> uart3_rts_pw4
Bank: 1 Reg: 0x0c302018 Val: 0x00000458 -> uart3_rx_pw3
Bank: 1 Reg: 0x0c302020 Val: 0x00000400 -> uart3_tx_pw2
Bank: 1 Reg: 0x0c302028 Val: 0x00001440 -> gen8_i2c_sda_pw1
Bank: 1 Reg: 0x0c302030 Val: 0x00001440 -> gen8_i2c_scl_pw0
Bank: 1 Reg: 0x0c302038 Val: 0x00000458 -> uart7_rx_pw7
Bank: 1 Reg: 0x0c302040 Val: 0x00000400 -> uart7_tx_pw6
Bank: 1 Reg: 0x0c302048 Val: 0x00000058 -> gpio_sen0_pv0
Bank: 1 Reg: 0x0c302050 Val: 0x00000400 -> gpio_sen1_pv1
Bank: 1 Reg: 0x0c302058 Val: 0x00000454 -> gpio_sen2_pv2
Bank: 1 Reg: 0x0c302060 Val: 0x00000400 -> gpio_sen3_pv3
Bank: 1 Reg: 0x0c302068 Val: 0x00000408 -> gpio_sen4_pv4
Bank: 1 Reg: 0x0c302070 Val: 0x00000000 -> gpio_sen5_pv5
Bank: 1 Reg: 0x0c302078 Val: 0x00000401 -> gpio_sen6_pv6
Bank: 1 Reg: 0x0c302080 Val: 0x00000401 -> gpio_sen7_pv7
Bank: 1 Reg: 0x0c302088 Val: 0x00001441 -> gpio_sen8_pee0
Bank: 1 Reg: 0x0c302090 Val: 0x00001441 -> gpio_sen9_pee1
Bank: 1 Reg: 0x0c303000 Val: 0x00000050 -> can_gpio7_paa7
Bank: 1 Reg: 0x0c303008 Val: 0x00000400 -> can1_dout_pz0
Bank: 1 Reg: 0x0c303010 Val: 0x00000458 -> can1_din_pz1
Bank: 1 Reg: 0x0c303018 Val: 0x00000400 -> can0_dout_pz2
Bank: 1 Reg: 0x0c303020 Val: 0x00000458 -> can0_din_pz3
Bank: 1 Reg: 0x0c303028 Val: 0x00006054 -> can_gpio0_paa0
Bank: 1 Reg: 0x0c303030 Val: 0x00006054 -> can_gpio1_paa1
Bank: 1 Reg: 0x0c303038 Val: 0x00000059 -> can_gpio2_paa2
Bank: 1 Reg: 0x0c303040 Val: 0x00000040 -> can_gpio3_paa3
Bank: 1 Reg: 0x0c303048 Val: 0x00000058 -> can_gpio4_paa4
Bank: 1 Reg: 0x0c303050 Val: 0x00000040 -> can_gpio5_paa5
Bank: 1 Reg: 0x0c303058 Val: 0x00000000 -> can_gpio6_paa6
Bank: 0 Reg: 0x02431000 Val: 0x00000401 -> gpio_aud3_pk0
Bank: 0 Reg: 0x02431008 Val: 0x00000401 -> gpio_aud2_pj7
Bank: 0 Reg: 0x02431010 Val: 0x00000058 -> gpio_aud1_pj6
Bank: 0 Reg: 0x02431018 Val: 0x00000054 -> gpio_aud0_pj5
Bank: 0 Reg: 0x02431020 Val: 0x00000059 -> aud_mclk_pj4
Bank: 0 Reg: 0x02431028 Val: 0x00000444 -> dap1_fs_pj3
Bank: 0 Reg: 0x02431030 Val: 0x00000454 -> dap1_din_pj2
Bank: 0 Reg: 0x02431038 Val: 0x00000404 -> dap1_dout_pj1
Bank: 0 Reg: 0x02431040 Val: 0x00000444 -> dap1_sclk_pj0
Bank: 0 Reg: 0x02432000 Val: 0x00006441 -> dmic1_clk_pm1
Bank: 0 Reg: 0x02432008 Val: 0x00006459 -> dmic1_dat_pm0
Bank: 0 Reg: 0x02432010 Val: 0x00006441 -> dmic2_dat_pm2
Bank: 0 Reg: 0x02432018 Val: 0x00006401 -> dmic2_clk_pm3
Bank: 0 Reg: 0x02432020 Val: 0x00006002 -> dmic4_dat_pm4
Bank: 0 Reg: 0x02432028 Val: 0x0000605a -> dmic4_clk_pm5
Bank: 0 Reg: 0x02432030 Val: 0x00006440 -> dap4_fs_pcc3
Bank: 0 Reg: 0x02432038 Val: 0x00006458 -> dap4_din_pcc2
Bank: 0 Reg: 0x02432040 Val: 0x00006400 -> dap4_dout_pcc1
Bank: 0 Reg: 0x02432048 Val: 0x00006440 -> dap4_sclk_pcc0
Bank: 0 Reg: 0x02430000 Val: 0x00000400 -> extperiph2_clk_po1
Bank: 0 Reg: 0x02430008 Val: 0x00000400 -> extperiph1_clk_po0
Bank: 0 Reg: 0x02430010 Val: 0x00001440 -> cam_i2c_sda_po3
Bank: 0 Reg: 0x02430018 Val: 0x00001440 -> cam_i2c_scl_po2
Bank: 0 Reg: 0x02430020 Val: 0x00000001 -> gpio_cam1_pn0
Bank: 0 Reg: 0x02430028 Val: 0x00000401 -> gpio_cam2_pn1
Bank: 0 Reg: 0x02430030 Val: 0x00000002 -> gpio_cam3_pn2
Bank: 0 Reg: 0x02430038 Val: 0x00000056 -> gpio_cam4_pn3
Bank: 0 Reg: 0x02430040 Val: 0x00000056 -> gpio_cam5_pn4
Bank: 0 Reg: 0x02430048 Val: 0x00000056 -> gpio_cam6_pn5
Bank: 0 Reg: 0x02430050 Val: 0x00000058 -> gpio_cam7_pn6
Bank: 0 Reg: 0x02434000 Val: 0x00000458 -> dap2_din_pc3
Bank: 0 Reg: 0x02434008 Val: 0x00000400 -> dap2_dout_pc2
Bank: 0 Reg: 0x02434010 Val: 0x00000440 -> dap2_fs_pc4
Bank: 0 Reg: 0x02434018 Val: 0x00000440 -> dap2_sclk_pc1
Bank: 0 Reg: 0x02434020 Val: 0x00000458 -> uart4_cts_pb3
Bank: 0 Reg: 0x02434028 Val: 0x00000400 -> uart4_rts_pb2
Bank: 0 Reg: 0x02434030 Val: 0x00000458 -> uart4_rx_pb1
Bank: 0 Reg: 0x02434038 Val: 0x00000400 -> uart4_tx_pb0
Bank: 0 Reg: 0x02434040 Val: 0x00000058 -> gpio_wan4_pc0
Bank: 0 Reg: 0x02434048 Val: 0x00000000 -> gpio_wan3_pb6
Bank: 0 Reg: 0x02434050 Val: 0x00000058 -> gpio_wan2_pb5
Bank: 0 Reg: 0x02434058 Val: 0x00000000 -> gpio_wan1_pb4
Bank: 0 Reg: 0x02434060 Val: 0x00001460 -> gen1_i2c_scl_pc5
Bank: 0 Reg: 0x02434068 Val: 0x00001460 -> gen1_i2c_sda_pc6
Bank: 0 Reg: 0x02435000 Val: 0x00000055 -> uart1_cts_pt3
Bank: 0 Reg: 0x02435008 Val: 0x00000055 -> uart1_rts_pt2
Bank: 0 Reg: 0x02435010 Val: 0x00000458 -> uart1_rx_pt1
Bank: 0 Reg: 0x02435018 Val: 0x00000400 -> uart1_tx_pt0
Bank: 0 Reg: 0x02435028 Val: 0x00022448 -> directdc1_out3_pq5
Bank: 0 Reg: 0x02435030 Val: 0x00022448 -> directdc1_out2_pq4
Bank: 0 Reg: 0x02435038 Val: 0x00022448 -> directdc1_out1_pq3
Bank: 0 Reg: 0x02435040 Val: 0x00022448 -> directdc1_out0_pq2
Bank: 0 Reg: 0x02435048 Val: 0x00022444 -> directdc1_in_pq1
Bank: 0 Reg: 0x02435050 Val: 0x00022448 -> directdc1_clk_pq0
Bank: 0 Reg: 0x02435058 Val: 0x00002000 -> directdc_comp
Bank: 0 Reg: 0x02433000 Val: 0x00006406 -> gpio_pq0_pi0
Bank: 0 Reg: 0x02433008 Val: 0x00006406 -> gpio_pq1_pi1
Bank: 0 Reg: 0x02433010 Val: 0x00006456 -> gpio_pq2_pi2
Bank: 0 Reg: 0x02433018 Val: 0x00006406 -> gpio_pq3_pi3
Bank: 0 Reg: 0x02433020 Val: 0x00004054 -> gpio_pq4_pi4
Bank: 0 Reg: 0x02433028 Val: 0x00004054 -> gpio_pq5_pi5
Bank: 0 Reg: 0x02433030 Val: 0x00004058 -> gpio_pq6_pi6
Bank: 0 Reg: 0x02433038 Val: 0x00004054 -> gpio_pq7_pi7
Bank: 0 Reg: 0x02440000 Val: 0x00000058 -> gpio_edp2_pp5
Bank: 0 Reg: 0x02440008 Val: 0x00000000 -> gpio_edp3_pp6
Bank: 0 Reg: 0x02440010 Val: 0x00000000 -> gpio_edp0_pp3
Bank: 0 Reg: 0x02440018 Val: 0x00000058 -> gpio_edp1_pp4
Bank: 0 Reg: 0x02440020 Val: 0x00000450 -> dp_aux_ch0_hpd_pp0
Bank: 0 Reg: 0x02440028 Val: 0x00000051 -> dp_aux_ch1_hpd_pp1
Bank: 0 Reg: 0x02440030 Val: 0x00000460 -> hdmi_cec_pp2
Bank: 0 Reg: 0x02437000 Val: 0x00000460 -> pex_l2_clkreq_n_pa6
Bank: 0 Reg: 0x02437008 Val: 0x00000470 -> pex_wake_n_pa2
Bank: 0 Reg: 0x02437010 Val: 0x00000460 -> pex_l1_clkreq_n_pa4
Bank: 0 Reg: 0x02437018 Val: 0x00000420 -> pex_l1_rst_n_pa3
Bank: 0 Reg: 0x02437020 Val: 0x00000460 -> pex_l0_clkreq_n_pa1
Bank: 0 Reg: 0x02437028 Val: 0x00000420 -> pex_l0_rst_n_pa0
Bank: 0 Reg: 0x02437030 Val: 0x00000420 -> pex_l2_rst_n_pa5
Bank: 0 Reg: 0x02438000 Val: 0x00002460 -> sdmmc1_clk_pd0
Bank: 0 Reg: 0x02438008 Val: 0x00002448 -> sdmmc1_cmd_pd1
Bank: 0 Reg: 0x02438010 Val: 0x00000000 -> sdmmc1_comp
Bank: 0 Reg: 0x02438014 Val: 0x00002448 -> sdmmc1_dat3_pd5
Bank: 0 Reg: 0x0243801c Val: 0x00002448 -> sdmmc1_dat2_pd4
Bank: 0 Reg: 0x02438024 Val: 0x00002448 -> sdmmc1_dat1_pd3
Bank: 0 Reg: 0x0243802c Val: 0x00002448 -> sdmmc1_dat0_pd2
Bank: 0 Reg: 0x02439000 Val: 0x00002400 -> eqos_td3_pe4
Bank: 0 Reg: 0x02439008 Val: 0x00002400 -> eqos_td2_pe3
Bank: 0 Reg: 0x02439010 Val: 0x00002400 -> eqos_td1_pe2
Bank: 0 Reg: 0x02439018 Val: 0x00002400 -> eqos_td0_pe1
Bank: 0 Reg: 0x02439020 Val: 0x00002450 -> eqos_rd3_pf1
Bank: 0 Reg: 0x02439028 Val: 0x00002450 -> eqos_rd2_pf0
Bank: 0 Reg: 0x02439030 Val: 0x00002450 -> eqos_rd1_pe7
Bank: 0 Reg: 0x02439038 Val: 0x00002448 -> eqos_mdio_pf4
Bank: 0 Reg: 0x02439040 Val: 0x00002450 -> eqos_rd0_pe6
Bank: 0 Reg: 0x02439048 Val: 0x00002400 -> eqos_mdc_pf5
Bank: 0 Reg: 0x02439050 Val: 0x00000000 -> eqos_comp
Bank: 0 Reg: 0x02439054 Val: 0x00002400 -> eqos_txc_pe0
Bank: 0 Reg: 0x0243905c Val: 0x00002450 -> eqos_rxc_pf3
Bank: 0 Reg: 0x02439064 Val: 0x00002400 -> eqos_tx_ctl_pe5
Bank: 0 Reg: 0x0243906c Val: 0x00002450 -> eqos_rx_ctl_pf2
Bank: 0 Reg: 0x0243a000 Val: 0x00002448 -> sdmmc3_dat3_pg5
Bank: 0 Reg: 0x0243a008 Val: 0x00002448 -> sdmmc3_dat2_pg4
Bank: 0 Reg: 0x0243a010 Val: 0x00002448 -> sdmmc3_dat1_pg3
Bank: 0 Reg: 0x0243a018 Val: 0x00002448 -> sdmmc3_dat0_pg2
Bank: 0 Reg: 0x0243a020 Val: 0x00000000 -> sdmmc3_comp
Bank: 0 Reg: 0x0243a024 Val: 0x00002448 -> sdmmc3_cmd_pg1
Bank: 0 Reg: 0x0243a02c Val: 0x00002460 -> sdmmc3_clk_pg0
Bank: 0 Reg: 0x02436004 Val: 0x00002060 -> sdmmc4_clk
Bank: 0 Reg: 0x02436008 Val: 0x00002048 -> sdmmc4_cmd
Bank: 0 Reg: 0x0243600c Val: 0x00002040 -> sdmmc4_dqs
Bank: 0 Reg: 0x02436010 Val: 0x00002048 -> sdmmc4_dat7
Bank: 0 Reg: 0x02436014 Val: 0x00002048 -> sdmmc4_dat6
Bank: 0 Reg: 0x02436018 Val: 0x00002048 -> sdmmc4_dat5
Bank: 0 Reg: 0x0243601c Val: 0x00002048 -> sdmmc4_dat4
Bank: 0 Reg: 0x02436020 Val: 0x00002048 -> sdmmc4_dat3
Bank: 0 Reg: 0x02436024 Val: 0x00002048 -> sdmmc4_dat2
Bank: 0 Reg: 0x02436028 Val: 0x00002048 -> sdmmc4_dat1
Bank: 0 Reg: 0x0243602c Val: 0x00002048 -> sdmmc4_dat0
Bank: 0 Reg: 0x0243b000 Val: 0x00000001 -> qspi_io3_pr4
Bank: 0 Reg: 0x0243b008 Val: 0x00000001 -> qspi_io2_pr3
Bank: 0 Reg: 0x0243b010 Val: 0x00000001 -> qspi_io1_pr2
Bank: 0 Reg: 0x0243b018 Val: 0x00000001 -> qspi_io0_pr1
Bank: 0 Reg: 0x0243b020 Val: 0x00000001 -> qspi_sck_pr0
Bank: 0 Reg: 0x0243b028 Val: 0x00000049 -> qspi_cs_n_pr5
Bank: 0 Reg: 0x0243b030 Val: 0x00002000 -> qspi_comp
Bank: 1 Reg: 0x0c301000 Val: 0x00000058 -> gpio_sw1_pff1
Bank: 1 Reg: 0x0c301008 Val: 0x00000058 -> gpio_sw2_pff2
Bank: 1 Reg: 0x0c301010 Val: 0x00000058 -> gpio_sw3_pff3
Bank: 1 Reg: 0x0c301018 Val: 0x00000058 -> gpio_sw4_pff4
Bank: 1 Reg: 0x0c301020 Val: 0x00000040 -> shutdown
Bank: 1 Reg: 0x0c301028 Val: 0x00000040 -> pmu_int
Bank: 1 Reg: 0x0c301030 Val: 0x00000001 -> safe_state_ps3
Bank: 1 Reg: 0x0c301038 Val: 0x00000450 -> vcomp_alert_ps4
Bank: 1 Reg: 0x0c301040 Val: 0x00000040 -> soc_pwr_req
Bank: 1 Reg: 0x0c301048 Val: 0x00000458 -> batt_oc_ps2
Bank: 1 Reg: 0x0c301050 Val: 0x00001040 -> clk_32k_in
Bank: 1 Reg: 0x0c301058 Val: 0x00000058 -> power_on_pff0
Bank: 1 Reg: 0x0c301060 Val: 0x00001440 -> pwr_i2c_scl_ps0
Bank: 1 Reg: 0x0c301068 Val: 0x00001440 -> pwr_i2c_sda_ps1
Bank: 1 Reg: 0x0c301080 Val: 0x00000401 -> gpio_dis0_pu0
Bank: 1 Reg: 0x0c301088 Val: 0x0000045a -> gpio_dis1_pu1
Bank: 1 Reg: 0x0c301090 Val: 0x00000402 -> gpio_dis2_pu2
Bank: 1 Reg: 0x0c301098 Val: 0x00000000 -> gpio_dis3_pu3
Bank: 1 Reg: 0x0c3010a0 Val: 0x00000402 -> gpio_dis4_pu4
Bank: 1 Reg: 0x0c3010a8 Val: 0x00000401 -> gpio_dis5_pu5
Bank: 0 Reg: 0x0243d000 Val: 0x0000040a -> gpio_wan8_ph3
Bank: 0 Reg: 0x0243d008 Val: 0x00000402 -> gpio_wan7_ph2
Bank: 0 Reg: 0x0243d010 Val: 0x00000456 -> gpio_wan6_ph1
Bank: 0 Reg: 0x0243d018 Val: 0x00000402 -> gpio_wan5_ph0
Bank: 0 Reg: 0x0243d020 Val: 0x00000400 -> uart2_tx_px0
Bank: 0 Reg: 0x0243d028 Val: 0x00000458 -> uart2_rx_px1
Bank: 0 Reg: 0x0243d030 Val: 0x00000400 -> uart2_rts_px2
Bank: 0 Reg: 0x0243d038 Val: 0x00000458 -> uart2_cts_px3
Bank: 0 Reg: 0x0243d040 Val: 0x00000402 -> uart5_rx_px5
Bank: 0 Reg: 0x0243d048 Val: 0x00000452 -> uart5_tx_px4
Bank: 0 Reg: 0x0243d050 Val: 0x00000002 -> uart5_rts_px6
Bank: 0 Reg: 0x0243d058 Val: 0x0000005a -> uart5_cts_px7
Bank: 0 Reg: 0x0243d060 Val: 0x00000058 -> gpio_mdm1_py0
Bank: 0 Reg: 0x0243d068 Val: 0x00000054 -> gpio_mdm2_py1
Bank: 0 Reg: 0x0243d070 Val: 0x00000058 -> gpio_mdm3_py2
Bank: 0 Reg: 0x0243d078 Val: 0x00000409 -> gpio_mdm4_py3
Bank: 0 Reg: 0x0243d080 Val: 0x00000000 -> gpio_mdm5_py4
Bank: 0 Reg: 0x0243d088 Val: 0x00000059 -> gpio_mdm6_py5
Bank: 0 Reg: 0x0243d090 Val: 0x00000058 -> gpio_mdm7_py6
Bank: 0 Reg: 0x0243d098 Val: 0x00000000 -> bcpu_pwr_req_ph4
Bank: 0 Reg: 0x0243d0a0 Val: 0x00000000 -> mcpu_pwr_req_ph5
Bank: 0 Reg: 0x0243d0a8 Val: 0x00000000 -> gpu_pwr_req_ph6
Bank: 0 Reg: 0x0243d0b0 Val: 0x00001440 -> gen7_i2c_scl_pl0
Bank: 0 Reg: 0x0243d0b8 Val: 0x00001440 -> gen7_i2c_sda_pl1
Bank: 0 Reg: 0x0243d0c0 Val: 0x00001440 -> gen9_i2c_sda_pl3
Bank: 0 Reg: 0x0243d0c8 Val: 0x00001440 -> gen9_i2c_scl_pl2
Bank: 0 Reg: 0x0243d0d0 Val: 0x00000460 -> usb_vbus_en0_pl4
Bank: 0 Reg: 0x0243d0d8 Val: 0x00000470 -> usb_vbus_en1_pl5
Bank: 0 Reg: 0x0243d0e0 Val: 0x00000400 -> gp_pwm7_pl7
Bank: 0 Reg: 0x0243d0e8 Val: 0x00000400 -> gp_pwm6_pl6
Bank: 0 Reg: 0x02441000 Val: 0x00022001 -> ufs0_rst_pbb1
Bank: 0 Reg: 0x02441008 Val: 0x00022001 -> ufs0_ref_clk_pbb0

We were able to reproduce your issue but after next few reboot we cannot hit this issue again…
Do you see such behavior too or it is always no response?

I can’t check it now.
I’ll check it out next Monday.
Thank you.

Hi larche,

One more thing to check. Are you able to see this line →
373: 0 0 0 0 tegra-gpio-aon 56 Edge Power

after checking the interrupt with below command?
cat /proc/interrupts

If yes, do you see any interrupt when you press the button?

An easy way to do this, if the key to the line is “tegra-gpio-aon 56 Edge Power”:
watch -n 1 egrep 'tegra-gpio-aon 56 Edge Power' /proc/interrupts

Or, if you are specifically interested in IRQ 373:
watch -n 1 egrep ' 373:' /proc/interrupts

You should see it update once per second.

Hi,

After many Command Reboots, I confirmed that the issue was not working.(But it doesn’t happen very well)
and sometimes I have seen audio not working.

Interrupt counting always works fine.