Jetson TX2i Display port not working

Hi goutam.gupta,

Some basic here.

  1. I think it would be better to attach the log as file here so that it would be easier to search what we want to see. Please attach it as file next time.

  2. In your latest log, I only see tegra display controller 15210000 which is configured with sor1 and hdmi display.

[ 1.003488] tegradc 15210000.nvdisplay: tegra_dc_parse_panel_ops: panel: /host1x/sor1/hdmi-display is not active

It means you didn’t modify nvidia,active-panel correctly. The dtb is still using hdmi-display but not dp-display.

Hi
Updated the nvidia,active-panel as hsown below :
sor1 {
status = “okay”;
nvidia,active-panel = <&sor1_dp_display>;

                    hdmi-display {
                            status = "disabled";
                            bootloader-status = "disabled";

                    };
                    dp-display {
                            status = "okay";
                            bootloader-status = "okay";

                    };
            };

The demsg log related to display is below:

[ 0.951042] tegradc 15210000.nvdisplay: disp0 connected to head1->/host1x/sor1
[ 0.951082] tegra_cec 3960000.tegra_cec: Unpowergate DISP: 0.
[ 0.951228] tegradc 15210000.nvdisplay: DT parsed successfully
[ 0.951246] tegradc 15210000.nvdisplay: Display dc.ffffff800b4a0000 registered with id=0log.txt (63.5 KB)
Attached complete log.
Thanks
Goutam

Hi,
Tried following and DP0 is working now. DP1 port is still not working.

            nvdisplay@15210000 {
                    status = "okay";
                    win-mask = <0x18>;
                    nvidia,fb-win = <0x3>;
                    nvidia,dc-or-node = "/host1x/sor1";
                    /delete-property/ avdd_hdmi-supply ;
                    /delete-property/ avdd-hdmi-pll-supply;
                    /delete-property/ vdd_hdmi_5v0-supply;
                    vdd-dp-pwr-supply = <&battery_reg>;
                    avdd-dp-pll-supply = <&battery_reg>;
                    vdd-edp-sec-mode-supply = <&battery_reg>;
                    vdd-dp-pad-supply = <&battery_reg>;


            };
            nvdisplay@15220000 {
                    status = "okay";
                    win-mask = <0x20>;
                    nvidia,fb-win = <0x5>;
                    nvidia,dc-or-node = "/host1x/sor";
                    /delete-property/ avdd_hdmi-supply ;
                    /delete-property/ avdd-hdmi-pll-supply;
                    /delete-property/ vdd_hdmi_5v0-supply;
                    vdd-dp-pwr-supply = <&battery_reg>;
                    avdd-dp-pll-supply = <&battery_reg>;
                    vdd-edp-sec-mode-supply = <&battery_reg>;
                    vdd-dp-pad-supply = <&battery_reg>;


            };

            sor {
                    status = "okay";
                    nvidia,active-panel = <&sor0_dp_display>;

                    dp-display {
                            bootloader-status = "okay";
                            status = "okay";
                    };
                    hdmi-display {
                            status = "disabled";
                    };

                    panel-s-edp-uhdtv-15-6 {
                            smartdimmer {
                                    status = "disabled";
                            };
                    };
            };

            sor1 {
                    status = "okay";
                    nvidia,active-panel = <&sor1_dp_display>;
                    dp-display {
                            status = "okay";
                            bootloader-status = "okay";

                    };

                    hdmi-display {
                            status = "disabled";

                    };

            };
                                                                                                                        
            dpaux@155c0000 {
                    status = "okay";


            };

            nvdisplay@15200000 {
                    status = "disabled";
            };

    };

Hi Goutam,

Then could you share the current log?

Please find attached the log. Only one DP port is working.

Thanks
Goutam

log.txt (82.0 KB)

Hi,

[ 3.463876] tegradc 15220000.nvdisplay: dp: aux write defer (0x10020000) – 6
[ 3.465956] tegradc 15220000.nvdisplay: dp: aux read defer (0x10020000) – 6

I see this log. Are you sure the power supply on sor0 is correct?

Could you convert your dtb back to dts and share us here?

extracted.txt (484.9 KB)
Attached converted dts file from dtb file.

Thanks
Goutam

Hi Goutam,

I just checked the dts but cannot find error. Looks no problem to me.

Here is the mapping of your display controller and sor.

sor1 → nvdisp 1521 (ok) ->dpaux@15040000
sor0 → nvidp 1522 (NG) → dpaux@155c0000

It is still possible that I missed something. You could try to compare all these nodes between the working and NG one.

That is, compare below nodes.

  1. sor0 and sor1,
  2. nvdisp 1521 and 1522
  3. dpaux@15040000 and 155c0000.

Also want to know…

will you see the “dp: aux write defer (0x10020000)” error when you run the working DP port?

I forgot to ask… have you configured the pinmux on dp_aux_ch0_hpd and dp_aux_ch1_hpd?

Hi,
I don’t see dp: aux write defer (0x10020000)” error when you run the working. I think sor port is working but sor1 is not working.
Isn’t hpd pins are already configured in default pin mux? How would one of the DP port have worked without HPD setting in pin mux.

Thanks
Goutam

Hi,

Isn’t hpd pins are already configured in default pin mux? How would one of the DP port have worked without HPD setting in pin mux.

Because the default setting is one SOR for DP while another SOR is for HDMI, the pinmux settings are different.

The message “dp: aux write defer (0x%x) – %d\n” prints when the dpaux is in I2CDEFER state. This can be normal if AUX/I2C is busy or the remote link is not ready when the request occurs.

Hi WayneWWW,
Both the DP ports are working now after making changes in pin mux settings.
Thanks for your support.

Thanks
Goutam

1 Like

Many thanks. Let me label your dts as a solution for other forum user to take as reference.

May I ask which changes you made? I am trying to do the same. The display is detected:

15210000.nvdisplay: disp0 connected to head1->/host1x/sor1
15210000.nvdisplay: Bootloader disp_param detected. Detected mode: 1920x1080 (on 0x0mm) pclk=148350937

I added this and set the DP statuses to okay for sor1 just like it’s mentioned in the comments above:

dpaux@15040000 {
	status = "okay";
};

nvdisplay@15210000 {
	status = "okay";
};

Oh, I see that you’re using the TX2i, I am using the normal TX2. I will figure out which pinmuxes I need for the TX2, but I have no idea where you did the changes.