please check chapter-4.2 power management controller, you’ll found wake event list to show the signal name as SPI2_CS0. you may configure that in the pinmux spreadsheet.
thanks
Can you explain, what documents should I check for " chapter-4.2 power management controller"?
Xavier’s TRM have only 4.1 chapter “Boot and Power Management Processor”
FYI,
Xavier doesn’t have a pin to support that function (PPS signal) in hardware.
you may have software modification to emulated PPS signal by using GPIO as PPS interface.
CONFIG_PPS and CONFIG_PPS_CLIENT_GPIO are already enabled in kernel.
please add Device tree node in kernel dtb anywhere inside dtsi like following:
pps {
gpios = <&tegra_aon_gpio TEGRA194_AON_GPIO(AA, 0) GPIO_ACTIVE_LOW>; //// here use gpio for the pin in which you want pps signal.
compatible = "pps-gpio";
assert-falling-edge;
status = "okay";
};
after system boots, you will see sysfs node for PPS. $ ls /sys/class/pps/pps0/
Whenever interrupt occurs on falling edge of signal of gpio pin, timestamp will be captured and seen using: cat /sys/class/pps/pps0/assert
You provided dts sample for PPS input case(Xavier consumes PPS signal).
But I want to produce PPS signal from Xavier. Is it possible with Xavier’s Ethernet controller?
you might check pps-gpio driver which uses GPIO pin as PPS source. $L4T_Sources/r32.4.2/Linux_for_Tegra/source/public/kernel/nvidia/drivers/nvpps/nvpps_main.c
there’s nodes to read timestamp from user-space, and use kernel function to fetch timestamp.
please also check similar discussion thread for reference, Topic 107409.
thanks
I checked nvpps driver and it isn’t suitable for us case, because it receives PPS pulses on GPIO. We want to generate Pulse-Per-Second impulses on Xavier’s GPIO and share to other hardware.
Lets I explain:
Xavier time should be synchronized to network clock with PTP.
Xavier should have GPIO output pin (for example TEGRA194_AON_GPIO(AA, 0) )
We want to generate PPS pulses from Xavier on the TEGRA194_AON_GPIO(AA, 0) pin
These PPS pulses should be synchronized to PTP clock
Usually ETH controller have some dedicated signal (like ENET_1588_EVENT0 in the I.MX Processors) , that can be routed to GPIO pin.Xavier’s ptp_pps_o looks like this pin.
FYI,
you should only using GPIO pins under AON category to feed pps signals, then you should connect your hardware on the pin for using.
may I know is it fine with AON gpio pin?
thanks
I think we can use any required AON gpio pin, because we’re developing our custom carrier board now.
What AON pin should we use? And how to forward PPS signal from Eth controller to this pin?
Hi kko-smol,
Xavier time is already in sync with network on boot.
To synchronize your HW precisely, can you try following steps if you are not dependent on ethernet module:
Enable CONFIG_TEGRA_HTS_GTE=y
Modify kernel dtb:
gte@c1e0000 {
status = “okay”;
}
Run GTE userspace sample application on target device:
In this example application, we are toggling 40-pin header Pin 16 (gpio=256) and feeding signals to Pin 32(gpio=257) every 1 second.
In the kernel source code:
locate tegra-gte-ioctl.h
copy it to /usr/include/linux/
locate tegra_gte_mon.c and compile gcc tegra_gte_mon.c -o gte_mon
Run app, ./gte_mon -d gtechip0 -g 257 -r -f &
4.a) ./gte_mon -h to print usage.
echo 256 >/sys/class/gpio/export
echo out >/sys/class/gpio/gpio256/direction
Start toggling GPIO 256 to observe the event.
while true: do
echo 1 >/sys/class/gpio/gpio256/value
echo 0 >/sys/class/gpio/gpio256/value
sleep 1
done
//This should print below message.
HW timestamp GPIO EVENT xxxx
could you comment on the following?
suggest if it is possible to implement hardware pps input timestamping?
Remember that /dev/pps0 is using software time stamping, and as such
it makes a relatively poor source for a PTP GM.
Some boards (but not yours) have PPS-in direct timestamping. Some iMX6s have this. You’ll still need to mod the driver as it only handles PPS-out, but
it’s < 25ns accurate once running.
Is <25ns accuracy achievable with AGX/NX ?
from linuxptp maintainers
You can’t expect microsecond accuracy using a PPS on a GPIO. Alone
the interrupt latency and jitter will cause too much time error.
If your MAC has any of these,
cat /sys/class/ptp/ptp0/n_external_timestamps
then you can arrange your PPS signal to be time stamped accurately in
the MAC. Then, you can use the ts2phc program to synchronize your
MAC’s PHC to the GPS’s PPS.
This file contains the number of external timestamp
channels offered by the PTP hardware clock.
So you are out of luck with this hardware platform.
You can use the PPS input on a “best effort” basis as follows.
Use ntpd (or chrony, or phc2sys, etc) to synchronize the Linux
system clock to the GPS time via the PPS input.
Then use phc2sys to synchronize the PHC to the Linux system clock