Hi Wayne,
I can confirm that my board design is active-high at cd-gpio pin. I have checked the voltage level when sd card inserted and no. My hardware engineer confirmed too.
I have bought 2 NX modules but one burned. So, i only have 1 NX module for now.
When sd card inserted, i see some errors
duong_dmesg_sd_error.txt (14.7 KB)
Do you have any advise?
HI,
Need to confirm. Which gpio pin is in use now? Your board schematic says you are using GPIO8. But during all these comments, you are giving me Q,1 which is GPIO10.
Hi Wayne,
I confirm that current cd-gpio pin is GPIO10 (Q,1).
In the previous version, we use GPIO8 (Q,2) for cd-gpio, but this gpio was used for FAN. So, in this version, we changed cd-gpio pin to GPIO10, the lable was not corrected.
Did you use the default kernel in jetpack? Or you have built it by yourself?
Hi Wayne,
I rebuild the kernel from source, base on Jetpack 4.4
I need to add our CSI-2 driver for Jetson NX, so i try to modify dts and rebuild kernel. My CSI-2 driver working well, but when i add the sd card, the problem coming as you see
Hi,
Please check if setting non-tuning mode changes anything or not.
uhs-mask = <0x3F>
hi Wayne,
I added uhs-mask = <0x3F>
sdmmc3: sdhci@3440000 {
mmc-ocr-mask = <0x0>;
cd-inverted;
cd-gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(Q, 1) GPIO_ACTIVE_HIGH>;
// cd-gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(Q, 2) GPIO_ACTIVE_LOW>;
nvidia,cd-wakeup-capable;
nvidia,vmmc-always-on;
mmc-ocr-mask = <0>;
cd-inverted;
// vmmc-supply = <&p3668_vdd_sdmmc1_sw>;
vmmc-supply = <&p3509_vdd_3v3_cvb>;
uhs-mask = <0x3F>;
status = “okay”;
};
My Jetson seem detect SD card but can not mount it to system.
nx@jetson:~$ lsblk
NAME MAJ:MIN RM SIZE RO TYPE MOUNTPOINT
loop0 7:0 0 16M 1 loop
mtdblock0 31:0 0 32M 0 disk
mmcblk0 179:0 0 14,7G 0 disk
�├�─mmcblk0p1 179:1 0 14G 0 part /
�├�─mmcblk0p2 179:2 0 64M 0 part
�├�─mmcblk0p3 179:3 0 64M 0 part
�├�─mmcblk0p4 179:4 0 448K 0 part
�├�─mmcblk0p5 179:5 0 448K 0 part
�├�─mmcblk0p6 179:6 0 63M 0 part
�├�─mmcblk0p7 179:7 0 512K 0 part
�├�─mmcblk0p8 179:8 0 256K 0 part
�├�─mmcblk0p9 179:9 0 256K 0 part
�├�─mmcblk0p10 179:10 0 300M 0 part
�└�─mmcblk0p11 179:11 0 199,1M 0 part
mmcblk0boot0 179:32 0 4M 1 disk
mmcblk0boot1 179:64 0 4M 1 disk
mmcblk0rpmb 179:96 0 4M 0 disk
mmcblk1 179:128 0 59,5G 0 disk
zram0 252:0 0 1,9G 0 disk [SWAP]
zram1 252:1 0 1,9G 0 disk [SWAP]
I see this error
[ 60.831931] mmcblk1: error -84 transferring data, sector 6, nr 2, cmd respon0
[ 60.921851] mmc1: Data end bit error
duong_dmesg.txt (121.1 KB)
Please also try different cards if possbile.
In your previous log where we didn’t set uhs-mask as 0x3f, there is timeout waiting for buffer read ready interrupt for CMD19 which is a tuning command.
Card is not responding to the tuning commands. The tuning process is failing and could be related to SI issues.
Hi Wayne,
I try with 3 SD cards,
[ 467.516040] mmcblk1: error -84 transferring data, sector 0, nr 8, cmd respons0
[ 467.604871] mmc1: Data end bit error
[ 467.604979] sdhci: =========== REGISTER DUMP (mmc1)===========
[ 467.605096] sdhci: Sys addr: 0x00000008 | Version: 0x00000505
[ 467.605213] sdhci: Blk size: 0x00007200 | Blk cnt: 0x00000007
[ 467.605325] sdhci: Argument: 0x00000000 | Trn mode: 0x0000003b
[ 467.605435] sdhci: Present: 0x010b0000 | Host ctl: 0x00000013
[ 467.605544] sdhci: Power: 0x00000001 | Blk gap: 0x00000000
[ 467.605654] sdhci: Wake-up: 0x00000000 | Clock: 0x00000007
[ 467.605763] sdhci: Timeout: 0x00000008 | Int stat: 0x00000000
[ 467.605873] sdhci: Int enab: 0x02ff008b | Sig enab: 0x02fc008b
[ 467.605985] sdhci: AC12 err: 0x00000000 | Slot int: 0x00000000
[ 467.606095] sdhci: Caps: 0x3f6cd08c | Caps_1: 0x18002f73
[ 467.606205] sdhci: Cmd: 0x0000123a | Max curr: 0x00000000
[ 467.606583] sdhci: Host ctl2: 0x00003008
[ 467.606894] sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x00000000ffefe410
[ 467.608715] sdhci: ===========================================
[ 467.614740] mmcblk1: error -84 transferring data, sector 0, nr 8, cmd respons0
[ 467.623724] mmcblk1: retrying using single block read
[ 467.628585] mmc1: CMD CRC or end bit error, int mask 0x20001
Please apply this patch to your kernel and dump the log for both tuning and non-tuning mode.
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index f2e6ed3..261220e 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -403,7 +403,7 @@
u32 trim_delay;
u8 i;
- pr_debug("======= %s: Tuning windows =======\n",
+ pr_err("======= %s: Tuning windows =======\n",
mmc_hostname(host->mmc));
reg = sdhci_readl(host, SDHCI_VNDR_TUN_CTRL0_0);
for (i = 0; i <= TUNING_WORD_SEL_MASK; i++) {
@@ -411,7 +411,7 @@
reg |= i;
sdhci_writel(host, reg, SDHCI_VNDR_TUN_CTRL0_0);
tuning_status = sdhci_readl(host, SDHCI_TEGRA_VNDR_TUNING_STATUS0);
- pr_debug("%s: tuning window[%d]: %#x\n",
+ pr_err("%s: tuning window[%d]: %#x\n",
mmc_hostname(host->mmc), i, tuning_status);
}
reg = sdhci_readl(host, SDHCI_TEGRA_VENDOR_CLOCK_CTRL);
@@ -419,35 +419,35 @@
tap_delay &= SDHCI_CLOCK_CTRL_TAP_MASK;
trim_delay = reg >> SDHCI_CLOCK_CTRL_TRIM_SHIFT;
trim_delay &= SDHCI_CLOCK_CTRL_TRIM_MASK;
- pr_debug("sdhci: Tap value: %u | Trim value: %u\n", tap_delay,
+ pr_err("sdhci: Tap value: %u | Trim value: %u\n", tap_delay,
trim_delay);
- pr_debug("==================================\n");
+ pr_err("==================================\n");
- pr_debug("Vendor clock ctrl: %#x\n",
+ pr_err("Vendor clock ctrl: %#x\n",
sdhci_readl(host, SDHCI_TEGRA_VENDOR_CLOCK_CTRL));
- pr_debug("Vendor SysSW ctrl: %#x\n",
+ pr_err("Vendor SysSW ctrl: %#x\n",
sdhci_readl(host, SDHCI_TEGRA_VENDOR_SYS_SW_CTRL));
- pr_debug("Vendor Err interrupt status : %#x\n",
+ pr_err("Vendor Err interrupt status : %#x\n",
sdhci_readl(host, SDHCI_TEGRA_VENDOR_ERR_INTR_STATUS));
- pr_debug("Vendor Cap overrides: %#x\n",
+ pr_err("Vendor Cap overrides: %#x\n",
sdhci_readl(host, SDHCI_TEGRA_VENDOR_CAP_OVERRIDES));
- pr_debug("Vendor Misc ctrl: %#x\n",
+ pr_err("Vendor Misc ctrl: %#x\n",
sdhci_readl(host, SDHCI_TEGRA_VENDOR_MISC_CTRL));
- pr_debug("Vendor Misc ctrl_1: %#x\n",
+ pr_err("Vendor Misc ctrl_1: %#x\n",
sdhci_readl(host, SDHCI_TEGRA_VENDOR_MISC_CTRL_1));
- pr_debug("Vendor Misc ctrl_2: %#x\n",
+ pr_err("Vendor Misc ctrl_2: %#x\n",
sdhci_readl(host, SDHCI_TEGRA_VENDOR_MISC_CTRL_2));
- pr_debug("Vendor IO trim ctrl: %#x\n",
+ pr_err("Vendor IO trim ctrl: %#x\n",
sdhci_readl(host, SDMMC_VNDR_IO_TRIM_CTRL_0));
- pr_debug("Vendor Tuning ctrl: %#x\n",
+ pr_err("Vendor Tuning ctrl: %#x\n",
sdhci_readl(host, SDHCI_VNDR_TUN_CTRL0_0));
- pr_debug("SDMEM comp padctrl: %#x\n",
+ pr_err("SDMEM comp padctrl: %#x\n",
sdhci_readl(host, SDHCI_TEGRA_SDMEM_COMP_PADCTRL));
- pr_debug("Autocal config: %#x\n",
+ pr_err("Autocal config: %#x\n",
sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG));
- pr_debug("Autocal status: %#x\n",
+ pr_err("Autocal status: %#x\n",
sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_STATUS));
- pr_debug("Tuning Status1: %#x\n",
+ pr_err("Tuning Status1: %#x\n",
sdhci_readl(host, SDHCI_TEGRA_VNDR_TUNING_STATUS1));
}
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index e355775..0c3bfed 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -2772,6 +2772,7 @@
else {
pr_err("%s: CMD CRC or end bit error, int mask %#x\n",
mmc_hostname(host->mmc), (unsigned)intmask);
+ sdhci_dumpregs(host);
host->cmd->error = -EILSEQ;
}
Hi,
Tuning and non-tuning means whether you set uhs-mask to 0x3F or the default one. Not means plug or not plug the sdcard…
And please also try this case.
uhs-mask = <0x7f>
Hi Wayne,
pls check log files
duong_dmesg_default_reboot_failed.txt (44.4 KB)
duong_dmesg_0x3f.txt (88.7 KB)
duong_dmesg_0x7f.txt (79.6 KB)
Hello,
It looks not a software issue. Are you able to check the SI status with your hardware engineer?
Hi Wayne,
What is SI status?
The signal integrity.
Hi, did you follow the OEM Design Guide to make your design? There are some notes for SD Card design, such as “The supply or load switch for the SD Card VDD must be enabled with a GPIO from Jetson. This is required for correct operation after a warm boot. The GPIO used should be selected so VDD is not powered on by default.” Did you follow the “SD Card Connection Example”?
Hi @Trumany,
Yes, we followed TX2 OEM Design Guide for our board design. But when we search “SDMMC3 enable” on this forums, we found that some people can use with vdd directly from 3.3V so we decided to remove SDMMC_VDD_EN pin from our design.
Hi @WayneWWW,
After i do apt-get update && apt-get upgrade, my Jetson seem works with SD card.
HI,
What was your jetpack version before you running apt update and upgrade? We have OTA update method supports here. If you just arbitrarily do the upgrade, it will automatically upgrade to next jetpack version and also the dtb and kernel will be our default one. I don’t think your sdcard would work at such state. Did you flash the dtb again after you do the upgrade?