用JP 7.2 (39.2.0)能够成功烧录系统,启动失败

我们自研硬件pcie3接的是128G的nvme;用JetPack 7.2 (39.2.0)能够成功烧录系统到128G nvme,但是启动失败 log如下,如何解决启动失败的问题?

3920-MobaXterm_COM8USBSerialPortCOM8_20260616_200911.txt (103.9 KB)

Please use the demuxer tool to split the log and dump again. Otherwise the log is garbled message and not able to read.

3920-MobaXterm_COM8USBSerialPortCOM8_20260616_200911.txt 这个是全部的log,报error之后会反复重启。下面是首次上电,第一次报error的log,???
[0000.098] I> MB1 (version: 0.25.1.1-t264-75019003-d9a316ff)
[0000.098] C> Boot-mode : Coldboot
[0000.098] C> MB1 last_boot_error: 0x0
[0000.098] I> Entry timestamp: 0x000143eb
[0000.100] C> rst_source: 0x0, rst_level: 0x0
[0000.105] I> BR-BCT: preprod_dev_sign: 0
[0000.108] I> Socket mask: 0x1
[0000.111] I> Socket id: 0
[0000.114] I> Chip supports UFS HS mode
[0000.117] I> BR last_boot_error0: 0x0
[0000.121] I> BR last_boot_error1: 0x0
[0000.124] I> BR last_boot_error2: 0x0
[0000.128] I> NVBCT is initialized
[0000.131] I> Task: PSC Mailbox init
[0000.134] I> Task: Bootchain select WAR set
[0000.138] I> Task: Bootchain update marker
[0000.142] I> Task: Send error information to MCU
[0000.147] I> Task: CRC Integrity check
[0000.150] I> Task: Bootrom patch record validation and params check
[0000.156] I> Task: CRC Integrity check
[0000.160] I> Task: SMN Transfer check
[0000.163] I> Task: Initialize UTMI PLL
[0000.167] I> Task: Initialize REF_UFS PLL
[0000.172] I> Task: Crypto init
[0000.174] I> Task: Boost clocks
[0000.177] I> tegrabl_clk_print_clock_freq not supported
[0000.182] I> mb1_clocks_soc_boost_clocks: Switch BPMP_CPU_NIC to NAFLL
[0000.189] I> mb1_clocks_soc_boost_clocks: CLK_SOURCE_AXI_CBB 0x0, bct.axi_cbb_clk_divisor 0
[0000.196] I> Task: Perform MB1 KAT tests
[0000.201] I> Task: NVRNG health check
[0000.203] I> NVRNG: Health check success
[0000.207] I> Task: Secure debug controls
[0000.211] I> Task: Program NV master stream id
[0000.215] I> Task: Enabling and initialization of MSS Bandwidth limiter
[0000.222] I> No request to configure MBWT settings for any PC!
[0000.228] I> Task: Verify boot mode
[0000.231] I> Task: Alias fuses
[0000.234] I> FUSE_ALIAS: Fuse alias on production fused part is not supported.
[0000.241] I> Task: Print SKU type
[0000.244] I> SKU: Floorswept F1
[0000.247] I> Task: Recalibrate SOC vmon
[0000.251] I> vmon adc_cal_revision 4, min_adc_fuse_rev 1
[0000.256] I> SOC VMON: min_reset 0, max_reset 0
[0000.260] I> SOC VMON ADC_SETUP: 0x00000000 to 0xc0000000
[0000.265] I> SOC VMON: Vmon re-calibration and fine tuning done
[0000.271] I> SOC VMON: min_reset 0, max_reset 0
[0000.275] I> Task: Select UFS ref clk
[0000.279] I> UFS device reference clock programmed to 26 MHz
[0000.285] I> Task: PMC AUX Clamp
[0000.288] I> Task: UPHY lane resets
[0000.291] I> Task: UPHY init
[0000.294] I> Configuring uphy in rate B
[0000.298] I> tegrabl_clk_print_clock_freq not supported
[0000.303] I> PLL3 ownership is assigned to PCIE
[0000.308] I> tegrabl_clk_print_clock_freq not supported
[0000.313] I> mphy_nv_calib_rev : 0, mphy_nv_calib_aux_val : 0
[0000.318] I> Enabling PLL with id : 3
[0000.321] I> Enabling PLL with id : 4
[0000.325] I> Skipping uphy_instance 1. Not supported yet
[0000.330] I> Skipping uphy_instance 2. Not supported yet
[0000.334] I> Task: Boot device init
[0000.338] I> Boot_device: QSPI_FLASH instance: 0
[0000.342] I> Using QSPI flash params from bct!!
[0000.347] I> PLLC is already locked
[0000.350] I> Qspi clock source : pllc_out0
[0000.354] I> QSPI Flash: Macronix 64MB at index: 5
[0000.359] I> QSPI-0l initialized successfully
[0000.363] I> Task: TSC init
[0000.366] I> Task: Load membct
[0000.368] C> RAM_CODE 0xc
[0000.371] I> Loading MEMBCT
[0000.374] I> Slot: 0
[0000.375] I> Binary[6] block-3840 (partition size: 0x60000)
[0000.381] I> Binary name: MEM-BCT-6
[0000.384] I> Size of crypto header is 8192
[0000.388] I> Size of crypto header is 8192
[0000.392] I> BCH of MEM-BCT-6 read from storage
[0000.397] I> MEM-BCT-6 header integrity check is success
[0000.402] I> Binary magic in BCH component 6 is MEM6
[0000.406] I> component binary type is 6
[0000.411] I> MEM-BCT-6 binary is read from storage
[0000.415] I> MEM-BCT-6 binary integrity check is success
[0000.420] C> RAM_CODE 0xc
[0000.424] C> RAM_CODE 0xc
[0000.426] I> Task: Load Page retirement list
[0000.429] I> DRAM ECC PRL is disabled
[0000.432] I> Task: SDRAM params override
[0000.436] I> Before update: MssEncryptGenKeys: 0x20000000, MssEncryptDistKeys: 0x00000000, McDefaultEncr: 0x00000000
[0000.447] I> Post update: MssEncryptGenKeys: 0x2000000f, MssEncryptDistKeys: 0x000f000f, McDefaultEncr: 0x80000100
[0000.457] I> Task: Save mem-bct info
[0000.460] I> Task: Carveout allocate
[0000.463] I> GR carveout will not be allocated
[0000.468] I> RCM blob carveout will not be allocated
[0000.487] I> Task: Enable WDT 5th expiry
[0000.487] I> Re-Enabling WDT
[0000.487] I> Task: I2C register
[0000.487] I> Task: Fuse Dump
[0000.487] I> opt_ucf_cluster_disable = 0x0
[0000.489] I> opt_c2c_disable = 0x0
[0000.492] I> opt_gpc_disable = 0x0
[0000.495] I> opt_tpc_disable = 0x8
[0000.499] I> opt_fbp_disable = 0x0
[0000.502] I> opt_nvdec_disable = 0x0
[0000.506] I> opt_nvenc_disable = 0x0
[0000.509] I> opt_isp_disable = 0x0
[0000.512] I> opt_mgbe_disable = 0x0
[0000.515] I> opt_fsi_disable = 0x0
[0000.518] I> fsi_ram_repair_enable = 0x1
[0000.522] I> opt_mss_disable = 0x0
[0000.525] I> OPT_IGPU_RESERVED = 0x165
[0000.529] C> BOOT_NV_INFO = 0x30f788
[0000.532] I> BOOTROM_PATCH_VERSION = 0x3
[0000.536] I> PSCROM_PATCH_VERSION = 0x7
[0000.540] I> OPT_ADC_CAL_FUSE_REV = 0x4
[0000.544] I> OPT_SW_L1MAINRST_ENABLE = 0x1
[0000.547] I> OPT_EMPD_CALIB_REV = 0x2
[0000.551] I> OPT_EMPD_CALIB = 0x784
[0000.554] I> OPT_CSDC_ENABLE = 0x0
[0000.558] I> OPT_PV_DAC_CTRL_REV = 0x3
[0000.561] I> OPT_PV_BG_CTRL_DAC_OFFSETS_REV = 0x3
[0000.566] I> opt_ECC_en = 0x1
[0000.568] I> SKU_INFO = 0xa0 (PROD)
[0000.572] C> OPT_SAMPLE_TYPE = 0x3
[0000.575] C> opt_subrevision = 0x2
[0000.578] I> opt_lot_code_0 = 0xf789243 (rdl)
[0000.582] I> opt_ft_rev = 0x40
[0000.585] I> opt_fuse_file_version = v55
[0000.589] I> slt_info = 0x3
[0000.592] I> cpu_speedo_calib = 0x883
[0000.595] I> cpu_ht_iddq_calib = 0x6e
[0000.599] I> soc_speedo_calib = 0x880
[0000.602] I> soc_ht_iddq_calib = 0x68
[0000.606] I> gpu_speedo_calib = 0x87b
[0000.609] I> gpu_ht_iddq_calib = 0x165
[0000.613] I> mss_speedo_calib = 0x874
[0000.616] I> mss_ht_iddq_calib = 0x18a0
[0000.620] I> Task: POD config init
[0000.623] I> Task: Reset FSI
[0000.626] I> Task: Update FSI scratch with fuse data
[0000.631] I> Task: Load and update platform data
[0000.635] I> Multi sku not enabled. Using platform data in MB1 BCT
[0000.641] I> Task: Release membct carveout
[0000.645] I> Task: Pinmux init
[0000.648] I> Task: Prod config init
[0000.652] W> PROD_CONFIG: controller prod table is empty in MB1 BCT.
[0000.657] I> Task: Pad voltage init
[0000.661] I> Task: Prod init
[0000.663] I> Task: Common rail init
[0000.673] I> DONE: Thermal configuration
[0000.679] I> DONE: SOC rail configuration
[0000.679] W> PMIC_CONFIG: Rail: MEMIO rail configuration not found in MB1 BCT.
[0000.682] I> DONE: MEMIO rail configuration
[0000.687] I> DONE: GPU rail configuration
[0000.690] W> PMIC_CONFIG: Rail: CV rail configuration not found in MB1 BCT.
[0000.696] I> DONE: CV rail configuration
[0000.701] W> PMIC_CONFIG: Rail: Platform configuration not found in MB1 BCT.
[0000.707] I> DONE: Platform configuration
[0000.711] W> PMIC_CONFIG: Rail: Shutdown configuration not found in MB1 BCT.
[0000.717] I> DONE: Shutdown configuration
[0000.721] I> Task: Mem clock src
[0000.724] I> Task: Misc. board config
[0000.728] I> PMIC_CONFIG: Platform config not found in MB1 BCT.
[0000.734] I> Task: SDRAM init
[0000.736] I> MemoryType: 4 MemBctRevision: 6
[0000.741] I> emc_clk_src: 0x4
[0000.743] I> ddll_clk_sel: 0x1
[0000.746] I> tegrabl_clk_print_clock_freq not supported
[0000.751] I> tegrabl_clk_print_clock_freq not supported
[0000.756] I> tegrabl_clk_print_clock_freq not supported
[0000.761] I> tegrabl_clk_print_clock_freq not supported
[0000.767] I> Encryption key distribution: MTS: en, TZ: en, VPR: en, GSC: en
[0000.773] I> Encryption: MTS: en, TZ: en, VPR: en, GSC: en
[0000.796] I> SDRAM initialized!
[0000.796] I> SDRAM Size in Total 0x2000000000
[0000.796] I> Task: Override sdram init
[0000.796] I> Task: MSS Encrypt status check
[0000.797] I> Task: CPU UCF init
[0000.800] I> RIST enabled
[0000.802] I> socket0 cfg1 plat0
[0000.805] I> dram: hashing mask 0x0068b62e3800 0x004b5a527e00 0x007fa9a6cc00 0x00e694cd5a00
[0000.813] I> MC channel:SCF slices enabled 0xffff:0xffff
[0000.819] I> fs : mode 0, cfg 0, scb 0
[0000.822] I> slc: 0xffff, first id 0
[0000.826] I> cpu: 0x3fff, first id 0
[0000.831] I> vmon adc_cal_revision 4, min_adc_fuse_rev 1
[0000.834] I> CPU VMON: min_reset 0, max_reset 0
[0000.839] I> CPU VMON ADC_SETUP: 0x00000000 to 0xc0000000
[0000.844] I> CPU VMON: Vmon re-calibration and fine tuning done
[0000.850] I> CPU VMON: min_reset 1, max_reset 1
[0000.854] I> vmon adc_cal_revision 4, min_adc_fuse_rev 1
[0000.859] I> MSS VMON: min_reset 0, max_reset 0
[0000.864] I> MSS VMON: Vmon re-calibration and fine tuning done
[0000.869] I> MSS VMON: min_reset 0, max_reset 0
[0000.874] I> SCF NAFLL started
[0000.877] I> SCF SPLL enabled
[0000.879] I> SCF PLLP enabled
[0000.883] I> Task: DRAM alias check
[0000.886] I> Memory Configuration socket 0
[0000.889] I> emem_size : 2000000000
[0000.893] I> ranks : 2
[0000.895] I> rank0_size : 800000000
[0000.898] I> rank1_size : 800000000
[0000.902] I> bank_lsb : d
[0000.904] I> bank_bits : 4
[0000.907] I> bank_mask0 : 4666392000
[0000.910] I> bank_mask1 : 979245a000
[0000.913] I> bank_mask2 : af7ab7c000
[0000.917] I> bank_mask3 : f5ad5aa000
[0000.920] I> channel_enable : ffff
[0000.923] I> channel_mask0 : 68b62e3800
[0000.927] I> channel_mask1 : 4b5a527e00
[0000.931] I> channel_mask2 : 7fa9a6cc00
[0000.935] I> channel_mask3 : e694cd5a00
[0000.938] I> ecc_enable : 0
[0000.941] I> gob_remap : 0
[0000.965] I> Task: MC config check
[0000.965] I> Task: Dram Ecc scrub
[0000.965] I> DRAM ECC Scrub Mode: staged
[0000.967] I> Task: IGPU carveout scrub
[0000.967] I> Task: Setup hpse_sb carveout
[0000.969] I> Task: Load hpse-fw
[0000.971] I> SCRATCH_MB1_OESP_INFO 0x1
[0000.975] I> Slot: 0
[0000.977] I> Binary[19] block-31232 (partition size: 0x140000)
[0000.982] I> Binary name: HPSE-PKG
[0000.986] I> Size of crypto header is 8192
[0000.990] I> Size of crypto header is 8192
[0000.994] I> BCH of HPSE-PKG read from storage
[0000.998] I> HPSE-PKG header integrity check is success
[0001.003] I> Binary magic in BCH component 0 is HPPK
[0001.008] I> component binary type is 19
[0001.011] I> Size of crypto header is 8192
[0001.021] I> HPSE-PKG binary is read from storage
[0001.022] I> HPSE-PKG binary integrity check is success
[0001.026] I> Task: Load sb-fw
[0001.028] I> Slot: 0
[0001.030] I> Binary[21] block-28672 (partition size: 0x140000)
[0001.035] I> Binary name: SB-PKG
[0001.039] I> Size of crypto header is 8192
[0001.042] I> Size of crypto header is 8192
[0001.047] I> BCH of SB-PKG read from storage
[0001.051] I> SB-PKG header integrity check is success
[0001.055] I> Binary magic in BCH component 0 is SBPK
[0001.060] I> component binary type is 21
[0001.064] I> Size of crypto header is 8192
[0001.073] I> SB-PKG binary is read from storage
[0001.074] I> SB-PKG binary integrity check is success
[0001.078] I> Task: TZDRAM carveout at runtime stage
[0001.082] I> Task: CPU UCF post init
[0001.088] I> CPU clk switch preping to PLLP
[0001.089] I> Invalid crab clk override 1 4 2
[0001.093] I> CPU clk switched to PLLP
[0001.097] I> min_freq_clamp 9
[0001.100] I> CPU NAFLL started
[0001.103] I> CPU PLLP enabled
[0001.106] I> scc_creg_defeature 0x08207ff1a07f932b
[0001.110] I> scc_misc_defeature 0x1f57ff0400620020
[0001.115] I> SCF NAFLL locked
[0001.118] I> SCF SPLL locked
[0001.120] I> SCF PLLP locked
[0001.123] I> SCF clk switch preping to NAFLL
[0001.127] I> SCF clk switched to NAFLL
[0001.130] I> CPU NAFLL locked
[0001.133] I> CPU PLLP locked
[0001.136] I> CPU clk switch preping to NAFLL
[0001.140] I> Invalid crab clk override 3 4 2
[0001.144] I> CPU clk switched to NAFLL
[0001.148] I> Task: Enable FSI FMON
[0001.151] I> PMC FMON: fault action 0x7 enabled
[0001.155] I> FSI FMON: fault action 0x3 enabled
[0001.160] I> FSI FMON: fault action 0x3 enabled
[0001.164] I> FSI FMON: fault action 0x3 enabled
[0001.169] I> FSI FMON: re-programming done
[0001.172] I> Task: Enable FSI VMON
[0001.176] I> vmon adc_cal_revision 4, min_adc_fuse_rev 1
[0001.181] I> FSI VMON: min_reset 0, max_reset 0
[0001.185] I> FSI VMON ADC_SETUP: 0x00000000 to 0xc0000000
[0001.191] I> FSI VMON: Vmon re-calibration and fine tuning done
[0001.196] I> FSI VMON: min_reset 1, max_reset 1
[0001.201] I> Task: Prepare Silicon Characterization
[0001.205] I> Task: SC7 Context Init
[0001.209] I> Task: Disable scm trigger
[0001.212] I> Task: CBB AMAP configuration
[0001.216] I> Task: Load IGPU FW
[0001.219] I> Slot: 0
[0001.221] I> Binary[22] block-38400 (partition size: 0x80000)
[0001.227] I> Binary name: IGPU_FW
[0001.230] I> Size of crypto header is 8192
[0001.234] I> Size of crypto header is 8192
[0001.238] I> BCH of IGPU_FW read from storage
[0001.242] I> IGPU_FW header integrity check is success
[0001.247] I> Binary magic in BCH component 0 is GBFW
[0001.252] I> component binary type is 22
[0001.256] I> Size of crypto header is 8192
[0001.264] I> IGPU_FW binary is read from storage
[0001.265] I> IGPU_FW binary integrity check is success
[0001.269] I> Task: Initialize C2C
[0001.272] I> Task: XUSB Powergate
[0001.276] I> XUSB powergate done.
[0001.278] I> Task: Select device mode
[0001.282] I> Task: Reconfigure MSS clients early boot
[0001.287] I> Task: MB1 fixed firewalls
[0001.290] I> Programming 6110 firewalls
[0001.318] I> Task: Load bpmp-fw
[0001.318] I> Slot: 0
[0001.318] I> Binary[16] block-8064 (partition size: 0x180000)
[0001.318] I> Binary name: BPMP_FW
[0001.318] I> Size of crypto header is 8192
[0001.322] I> Size of crypto header is 8192
[0001.326] I> BCH of BPMP_FW read from storage
[0001.330] I> BPMP_FW header integrity check is success
[0001.335] I> Binary magic in BCH component 0 is BPMF
[0001.340] I> component binary type is 16
[0001.343] I> Size of crypto header is 8192
[0001.361] I> BPMP_FW binary is read from storage
[0001.363] I> BPMP_FW binary integrity check is success
[0001.363] I> Slot: 0
[0001.364] I> Binary[17] block-11136 (partition size: 0x40000)
[0001.364] I> Binary name: BPMP_FW_DTB
[0001.368] I> Size of crypto header is 8192
[0001.372] I> Size of crypto header is 8192
[0001.376] I> BCH of BPMP_FW_DTB read from storage
[0001.381] I> BPMP_FW_DTB header integrity check is success
[0001.385] I> Binary magic in BCH component 0 is BPMD
[0001.390] I> component binary type is 17
[0001.394] I> Size of crypto header is 8192
[0001.398] I> BPMP_FW_DTB binary is read from storage
[0001.403] I> BPMP_FW_DTB binary integrity check is success
[0001.408] I> Task: BPMP fw ast config
[0001.412] I> Task: Program bpmp-fw ipc carveouts
[0001.417] I> Task: Update GPU VMON scratch regs
[0001.420] I> Task: Load psc-fw
[0001.423] I> Slot: 0
[0001.425] I> Binary[18] block-11648 (partition size: 0xc0000)
[0001.431] I> Binary name: PSC_FW
[0001.434] I> Size of crypto header is 8192
[0001.438] I> Size of crypto header is 8192
[0001.442] I> BCH of PSC_FW read from storage
[0001.446] I> PSC_FW header integrity check is success
[0001.451] I> Binary magic in BCH component 0 is PFWP
[0001.456] I> component binary type is 18
[0001.460] I> Size of crypto header is 8192
[0001.469] I> PSC_FW binary is read from storage
[0001.470] I> PSC_FW binary integrity check is success
[0001.473] I> Task: Wait for C2C complete
[0001.476] I> Task: Program C2C PLMs
[0001.480] I> Task: GPIO interrupt map
[0001.483] I> Task: SC7 context save
[0001.486] I> Slot: 0
[0001.488] I> Binary[25] block-0 (partition size: 0x100000)
[0001.494] I> Binary name: BR_BCT
[0001.497] I> Size of crypto header is 8192
[0001.501] I> Size of crypto header is 8192
[0001.505] I> Size of crypto header is 8192
[0001.509] I> BR_BCT binary is read from storage
[0001.513] I> BR_BCT binary integrity check is success
[0001.518] I> Slot: 0
[0001.520] I> Binary[14] block-13184 (partition size: 0x40000)
[0001.526] I> Binary name: SC7-FW
[0001.529] I> Size of crypto header is 8192
[0001.532] I> Size of crypto header is 8192
[0001.536] I> Size of crypto header is 8192
[0001.540] I> Size of crypto header is 8192
[0001.545] I> BCH of SC7-FW read from storage
[0001.549] I> SC7-FW header integrity check is success
[0001.553] I> Binary magic in BCH component 0 is WB0B
[0001.558] I> component binary type is 14
[0001.562] I> Size of crypto header is 8192
[0001.568] I> SC7-FW binary is read from storage
[0001.571] I> SC7-FW binary integrity check is success
[0001.575] I> Size of crypto header is 8192
[0001.579] I> Size of crypto header is 8192
[0001.583] I> Size of crypto header is 8192
[0001.587] I> Slot: 0
[0001.589] I> Binary[24] block-3584 (partition size: 0x20000)
[0001.594] I> Binary name: MB1_BCT
[0001.597] I> Size of crypto header is 8192
[0001.601] I> Size of crypto header is 8192
[0001.605] I> Size of crypto header is 8192
[0001.609] I> Size of crypto header is 8192
[0001.614] I> BCH of MB1_BCT read from storage
[0001.618] I> MB1_BCT header integrity check is success
[0001.622] I> Binary magic in BCH component 0 is MBCT
[0001.627] I> component binary type is 24
[0001.631] I> Size of crypto header is 8192
[0001.635] I> MB1_BCT binary is read from storage
[0001.640] I> MB1_BCT binary integrity check is success
[0001.649] I> Task: Load MB2rf binary to SC7 ctx
[0001.649] I> Slot: 0
[0001.651] I> Binary[15] block-13696 (partition size: 0x50000)
[0001.656] I> Binary name: MB2_RF
[0001.659] I> Size of crypto header is 8192
[0001.663] I> Size of crypto header is 8192
[0001.667] I> Size of crypto header is 8192
[0001.671] I> Size of crypto header is 8192
[0001.675] I> BCH of MB2_RF read from storage
[0001.680] I> MB2_RF header integrity check is success
[0001.684] I> Binary magic in BCH component 0 is MB2R
[0001.689] I> component binary type is 15
[0001.692] I> Size of crypto header is 8192
[0001.699] I> MB2_RF binary is read from storage
[0001.702] I> MB2_RF binary integrity check is success
[0001.706] I> Task: Save sc7 membct params data
[0001.710] I> Task: Save temp carveout data
[0001.714] I> Task: Save unmapped sdram params
[0001.720] I> SC7 context save done
[0001.722] I> Task: Release CARVEOUT_TEMP_PSCBL
[0001.726] I> Task: Load MB2/Applet/FSKP/MB2RF
[0001.730] I> Loading MB2
[0001.732] I> Slot: 0
[0001.734] I> Binary[10] block-6144 (partition size: 0xc0000)
[0001.740] I> Binary name: MB2
[0001.742] I> Size of crypto header is 8192
[0001.746] I> Size of crypto header is 8192
[0001.751] I> BCH of MB2 read from storage
[0001.755] I> MB2 header integrity check is success
[0001.759] I> Binary magic in BCH component 0 is MB2B
[0001.764] I> component binary type is 10
[0001.767] I> Size of crypto header is 8192
[0001.779] I> MB2 binary is read from storage
[0001.780] I> MB2 binary integrity check is success
[0001.780] I> Task: Initialize MB2 page table
[0001.784] I> Task: Dram ecc test
[0001.787] I> Task: Map CCPLEX SHARED carveout
[0001.791] I> Task: Ack HPSE mbox
[0001.794] I> Task: Ack SB mbox
[0001.797] I> Task: Misc NV security settings
[0001.801] I> Task: Runtime IST init
[0001.805] I> Task: Disable/Reload WDT
[0001.808] I> Task: Initialize MB2 params
[0001.812] I> Task: Prepare MB2 params
[0001.815] I> is_multi_sku_enabled = 0x0, sku_value = 0x0
[0001.821] I> Is Strong box enabled: 1
[0001.824] I> Is snor provision disabled: 0
[0001.829] I> mb2_params: num_boot_chains 2
[0001.832] I> Task: Check pending RAS error
[0001.836] I> SLCG Global override disabled
[0001.840] I> MB1: MSS reconfig completed
[0001.844] I> Skip CO:46 wait for scrub, not enqueued to scrub_queue
[0001.850] I> scf carveout 45 is not present
[0001.854] I> Programming 9 firewalls
??[0001.892] I> MB2 (version: 0.0.0.0-t264-75019003-51d6d425-01Jun26-131927-0700)
[0001.893] I> Boot-mode : Coldboot
[0001.893] I> Entry timestamp: 0x001c8021
[0001.893] I> Socket mask: 0x1
[0001.895] I> Socket id: 0
[0001.898] I> Chip supports UFS HS modes
[0001.902] I> Task: Crypto init
[0001.904] I> Task: Mb2 kat test
[0001.908] I> RSA PSS signature check: OK
[0001.912] I> ED25519 signature check: OK
[0001.915] I> XMSS signature check: OK
[0001.918] I> GCM encryption: OK
[0001.921] I> GCM decryption: OK
[0001.924] I> Task: MB2 Params integrity check
[0001.928] I> Task: Measured Boot init
[0001.932] I> Task: fTPM silicon identity init
[0001.936] I> fTPM not enabled
[0001.939] I> Task: Unpowergate AUD domain
[0001.943] I> Task: Enable CCPLEX WDT 5th expiry
[0001.947] I> Task: Store Fuse config
[0001.950] I> Task: Check MC errors
[0001.954] I> Task: DRAM ECC Scrub in MB2
[0001.957] I> DRAM ECC Scrub Mode: staged
[0001.961] I> Task: DRAM ECC Scrub remaining DRAM in MB2
[0001.967] I> Task: PSC mailbox init
[0001.970] I> Task: Map CCPLEX_INTERWORLD_SHMEM carveout
[0001.976] I> Task: Disable global SMMU bypass
[0001.979] I> Task: Boot device init
[0001.982] I> Boot_device: QSPI_FLASH instance: 0
[0001.987] I> Using QSPI flash params from bct!!
[0001.991] I> QSPI Flash: Macronix 64MB at index: 5
[0001.996] I> QSPI-0l initialized successfully
[0002.000] I> Secondary storage device: QSPI_FLASH instance: 0
[0002.006] I> Task: Partition Manager Init
[0002.010] I> Found 71 partitions in QSPI_FLASH (instance 0)
[0002.015] I> Task: Memdtb task register
[0002.019] C> RAM_CODE 0xc
[0002.021] I> Task: Load and authenticate memdtb
[0002.025] I> Partition name: A_mem-dtb
[0002.029] I> Size of partition: 524288
[0002.033] I> Bin@ dev:3/0 blk-4608 sz:0x80000 A_mem-dtb
[0002.038] I> Ratchet: [A_mem-dtb]: sw (BCH): 0, hw (BCT): 0
[0002.043] I> mem-dtb6 : oem authentication of header done
[0002.049] I> mem-dtb6: meta-blob integ OK
[0002.055] I> version 1 Bin 1 BCheckSum 0 content_size 0 Content ChkSum 1 reserved_00 0
[0002.060] I> Reserved10 0 BlockMaxSize 5 Reserved11 0
[0002.065] I> mem-dtb6 : decompressed to 514576 bytes
[0002.070] I> mem-dtb6: plain bin integ OK
[0002.073] I> mem-dtb6: Authentication Finalize Done
[0002.078] C> RAM_CODE 0xc
[0002.080] I> Task: I2C register
[0002.084] I> Task: Populate MAC ID for FSI
[0002.112] I> Task: OEM SC7 context save init
[0002.113] I> Task: Check boundary values for TZDRAM data
[0002.113] I> Task: AUXP FW preload init
[0002.115] I> Task: Reset FSI CAN controllers
[0002.115] I> Task: Prepare eeprom data
[0002.143] I> Task: Set early boot firewall programming stage
[0002.143] I> Task: Program OEM firewalls - early boot
[0002.146] I> OEM firewalls configured
[0002.146] I> Task: Set FSI firewall programming stage
[0002.148] I> Task: Powergate AUD DOMAIN
[0002.151] I> Task: Trigger mailbox for PSC-BL1 exit
[0002.159] I> Task: Setup early auxp fw loader tasks
[0002.161] I> Skipping FSI FW load
[0002.164] I> Task: Load and authenticate registered FWs
??
bp??[000??mp: ??2.16??star??9] I??t
b??> Ta??pmp:??sk: ?? WDT??Pass?? boo?? DRA??t cf??M EC??g 0x??C PR??7106??L Fl??40 s??ag t??ts 0??o FS??x631??I
[??
bp??0002??mp: ??.173??sock??] I>??et 0?? Tas??
bp??k: P??mp: ??rogr??firm??am F??ware??SI l?? tag??ate ?? is ??boot??50c0?? fir??e474??ewal??59b7??ls
??9442??[000??6ee4??2.17??-b8f??9] I??4737??> OE??c39f??M fi??
in??rewa??itia??lls ??lize??conf??d pm??igur??mac??ed
??h
i??[000??niti??2.18??aliz??5] I??ed s??> Ta??ec_p??sk: ??erim??Set ??eter??late??
in?? boo??itia??t fi??lize??rewa??d ps??ll p??c
i??rogr??niti??ammi??aliz??ng s??ed c??tage??2c
??
[0??swdt??002.??imer??201]??ini?? I> ??t: r??Task??eg p??: Ea??olli??rly ??ng s??unha??tart??lt A?? w p??UXPs??erio??
??211]???002.?? ms
ini?? I> ??tial??FSI ??ized??unha?? swd??lt s??time??kipp??r
i??ed
??> Ta??[000??aliz??2.22??ed v??1] I??wdt
??copy??ini??sk: ??tial??Wait??ized?? for?? mai?? mem??l_ea??dtb ??rly
ini??
[0??tial??002.??ized??231]?? fus?? I> ??e
i??Task??niti??: Cr??aliz??oss ??ed v??sock??frel??et s??
in??ync ??itia??init??lize??
[0??d ad??002.??c
f??243]??mon
?? I> ??popu??Task??late??: TS??mon??C sy??itor??nc s??s: f??tart??ound??
[0?? 237??002.?? mon??252]??itor?? I> ??s
??itask??niti??: RA??aliz??S MU??ed f??X in??mon
??
??> Ta??000??tial??2.26??ized??2] I?? mc
ini??sk: ??tial??Setu??ized??p au?? res??xp f??et
??w lo??init??ader??iali?? tas??zed ??ks
??uphy??[000??ear??2.27??ly
??5] I??init??> Sk??iali??ippi??zed ??ng R??emc
??TID ??earl??FW l??y
??niti??
[00??aliz??02.2??ed p??84] ??m
5??I> T??02 c??ask:??lock?? Loa??s re??d an??gist??d au??ered??then??
in??tica??itia??te r??lize??egis??d cl??tere??k_ma??d FW??ch
??s
[??hand??0002??ling??.298?? unr??] I>??efer?? Par??ence??titi??d cl??on n??ks
??ame:??init?? A_a??iali??on-f??zed ??w
[??clk??0002??cal??.309??earl??] I>??y
v?? Siz??pll0??e of?? rat?? par??e sa??titi??niti??on: ??zed ??2621??from??44
?? 270??[000??0000??2.32??000 ??0] I??to 1??> Bi??6200??n@ d??0000??ev:3??0
v??/0 b??pll1??lk-3?? rat??5840??e sa?? sz:??niti??0x40??zed ??000 ??from??A_ao?? 270??n-fw??0000??
[0??000 ??002.??to 1??335]??6200?? I> ??0000??Ratc??0
v??het:??pll2?? [A_?? rat??aon-??e sa??fw]:??niti?? sw ??zed ??(BCH??from??): 0?? 270??, hw??0000?? (BC??000 ??T): ??to 1??0
[??6200??0002??0000??.351??0
v??] I>??pll3?? aon?? rat?? : o??e sa??em a??niti??uthe??zed ??ntic??from??atio?? 270??n of??0000?? hea??000 ??der ??to 1??done??6200??
[0??0000??002.??0
??0000???pll4?? I> ?? rat??aon:??e sa?? met??niti??a-bl??zed ??ob i??from??nteg?? 270?? OK
[00??000 ??02.3??to 1??79] ??6200??I> v??0000??ersi??0
v??on 1??pll5?? Bin?? rat?? 1 B??e sa??Chec??niti??kSum??zed ?? 0 c??from??onte?? 270??nt_s??0000??ize ??000 ??0 Co??to 1??nten??6200??t Ch??0000??kSum??0
v?? 1 r??pll6??eser?? rat??ved_??e sa??00 ??niti??0
[??zed ??0002??from??.399?? 270??] I>??0000?? Res??000 ??erve??to 1??d10 ??6200??0 Bl??0000??ockM??0
v??axSi??pll7??ze 5?? rat?? Res??e sa??erve??niti??d11 ??zed ??0
[??from??0002?? 270??.414??0000??] I>??000 ?? aon??to 1?? : d??6200??ecom??0000??pres??0
??ach_???niti??to 1??aliz??4675??ed c??2 by??lk_m??tes
[00??earl??02.4??y_co??27] ??nfig??I> a??
in??on: ??itia??plai??lize??n bi??d nv??n in??ther??teg ??m
i??OK
??niti??[000??aliz??2.43??ed r??8] I??egim??> Pa??e
i??rtit??niti??ion ??aliz??name??INFO??ed a??: A_??: so??dc_t??rce-??cket??herm??fw
?? 0 o??al
??init??2.44??
INF??iali??8] I??O: E??zed ??> Si??nter??isin??ze o??ing ??k
??!f pa??psc_??niti??rtit??moni??aliz??ion:??tor_??ed n?? 458??init??meas??752
I??
ra??
[00??NFO:??m_as??02.4?? GSC??sist??59] ??22 B??gra??I> B??OM:0??cs_i??in@ ??x1fd??nit:??dev:??e002?? Fou??3/0 ??000 ??nd 1??8 sz??0000??4 gr??3404??:0x1??acs
ini??:0x7??00 C??tial??0000??LIEN??ized?? A_r??T_AC?? ram??ce-f??CESS??ass??w
??0002??1800??
ini??.474??00
??rce??D VE??INFO??ized?? Rat??: PS?? ra
??chet??CFW ??trac??: [A??BUIL??ker
ini??-fw]??RSIO??tial??: sw??N: 9??ized?? (BC??5497?? ith??H): ??14-f??rott??0, h??b03a??le
??w (B??57-5??init??CT):??a3f2??iali?? 0
??2.49??y-re??[000??dirt??i2c
vrm??6] I??l-t2??on_d??> ao??64
??t_in??n: A??INFO??it: ??uthe??: ms??vrmo??ntic??tatu??n no??atio??s:0x??de n??n Fi??a000??ot f??nali??0080??ound??ze D??0
I??
??NFO:??mon??
[00?? Sup??chk??02.5??ervi??boot??16] ??sor ??sta??I> r??entr??te: ??ce :??y_po??foun?? oem??int:??d 0 ?? aut??? mon??icat??nt??c00
INF??itor??ion ??O: S??s
i??of h??witc??niti??eade??h fr??aliz??r do??eque??ed v??ne
??ncy ??rmon??[000??from??
in??2.53?? Vbo??itia??8] I??ot t??lize??> rc??o Vm??d re??e: m??in
??blob??: MO??INFO??tor
ini?? int??NITO??tial??eg O??R: u??ized??K
[??ser ?? hw
??0002??task??clvc??.555?? add??
dr??] I>??r:0x??am_c?? ver??1fde??lk: ??sion??0220??opp0?? 1 B??00, ?? fre??in 1??blob??q ?? BCh?? off?? 66??eckS??set:??5600??um 0??0x00?? reg?? con??0200??ular??tent??00
??ent ??R: p??INFO?? 0x0??e 0 ??: MO??0010??Cont??NITO??000
??2750?? dra??ChkS??opul??m_cl??um 1??ated??k: o?? res?? use??pp1 ??erve??r im??freq??d_00??ages?? ?? 0
[00??
INF??000 ??02.5??O: m??regu??88] ??ret ??lar ??I> R??to S??rev ??eser??uper??0x00??ved1??viso??0100??0 0 ??r!
??00
??t.oc??INFO??dram??kMax??: ps??clk??Size??c su??: op?? 5 R??perv??p2 f??eser??isor??req ??ved1?? ini?? 3??1 0
??2000??
[00??INFO??00 r??02.6??: ps??egul??16] ??c_ir??ar r??I> r??q_in??ev 0??ce :??it..??x000?? dec??.
I??1000??ompr??NFO:??0
?? opp??904 ???ram
??d to??ble ??clk:?? 619??WDT
INF??3 fr??byte??O: p??eq ??s
[??sc s?? 42??0002??uper??6600??.629??viso??0 re??] I>??r en??gula?? rce??ter ??r re??: pl??idle??v 0x??ain ?? tas??0001??bin ??k.
??0000??inte??
dr??g OK??am_c??
[0??lk: ??002.??opp4??644]?? fre?? I> ??q ??Part?? 66??itio??5600??n na?? der??me: ??ated??A_dc?? rev??e-fw?? 0x0??
??660]???002.??000
dra?? I> ??m_cl??Size??k: o?? of ??pp5 ??part??freq??itio?? ??n: 2??2750??0971??000 ??52
??dera??[000??ted ??2.67??rev ??7] I??0x00??> Bi??0100??n@ d??00
??ev:3??dram??/0 b??clk??lk-2??: op??4576??p6 f?? sz:??req ??0x20?? 3??0000??2000?? A_d??00 d??ce-f??erat??w
[??ed r??0002??ev 0??.698??x000??] I>??1000?? Rat??0
d??chet??ram
??: [A??clk:??_dce?? opp??-fw]??7 fr??: sw??eq ?? (BC?? 42??H): ??6600??0, h??0 de??w (B??rate??CT):??d re?? 0
??v 0x??[000??0001??2.71??0000??3] I??
??> rce: Authentication Finalize Done
[0002.727] I> dce : oem authentication of header done
[0002.746] I> dce: meta-blob integ OK
[0002.753] I> version 1 Bin 1 BCheckSum 0 content_size 0 Content ChkSum 1 reserved_00 0
[0002.758] I> Reserved10 0 BlockMaxSize 5 Reserved11 0
[0002.826] I> dce : decompressed to 12471072 bytes
[0002.846] I> dce: plain bin integ OK
[0002.846] I> Partition name: A_adsp0-fw
[0002.847] I> Size of partition: 524288
[0002.847] I> Bin@ dev:3/0 blk-36352 sz:0x80000 A_adsp0-fw
[0002.849] I> Ratchet: [A_adsp0-fw]: sw (BCH): 0, hw (BCT): 0
[0002.854] I> dce: Authentication Finalize Done
[0002.860] I> ape : oem authentication of header done
[0002.863] I> ape: meta-blob integ OK
[0002.869] I> version 1 Bin 1 BCheckSum 0 content_size 0 Content ChkSum 1 reserved_00 0
[0002.874] I> Reserved10 0 BlockMaxSize 5 Reserved11 0
[0002.881] I> ape : decompressed to 360224 bytes
[0002.884] I> ape: plain bin integ OK
[0002.887] I> Partition name: A_adsp1-fw
[0002.890] I> Size of partition: 524288
[0002.894] I> Bin@ dev:3/0 blk-37376 sz:0x80000 A_adsp1-fw
[0002.900] I> Ratchet: [A_adsp1-fw]: sw (BCH): 0, hw (BCT): 0
[0002.905] I> ape: Authentication Finalize Done
[0002.910] I> ape1 : oem authentication of header done
[0002.914] I> ape1: meta-blob integ OK
[0002.922] I> version 1 Bin 1 BCheckSum 0 content_size 0 Content ChkSum 1 reserved_00 0
[0002.925] I> Reserved10 0 BlockMaxSize 5 Reserved11 0
[0002.933] I> ape1 : decompressed to 360224 bytes
[0002.935] I> ape1: plain bin integ OK
[0002.938] I> Partition name: A_xusb-fw
[0002.942] I> Size of partition: 196608
[0002.945] I> Bin@ dev:3/0 blk-7680 sz:0x30000 A_xusb-fw
[0002.951] I> xusb: hw ratchet 1
[0002.954] I> xusb: [0].u8_ratchet_val 1
[0002.957] I> Ratchet: [A_xusb-fw]: sw (BCH): 1, hw (BCT): 1
[0002.963] I> ape1: Authentication Finalize Done
[0002.970] I> Partition name: A_pva-fw
[0002.970] I> Size of partition: 2621440
[0002.974] I> Bin@ dev:3/0 blk-39424 sz:0x280000 A_pva-fw
[0002.979] I> Ratchet: [A_pva-fw]: sw (BCH): 0, hw (BCT): 0
[0002.984] I> xusb: Authentication Finalize Done
[0002.989] I> pva : oem authentication of header done
[0002.994] I> pva: meta-blob integ OK
[0003.005] I> version 1 Bin 1 BCheckSum 0 content_size 0 Content ChkSum 1 reserved_00 0
[0003.005] I> Reserved10 0 BlockMaxSize 5 Reserv??init??ed11??iali?? 0
??3.01??[000??emc
??6] I> pva : decompressed to 2152896 bytes
[0003.020] I> pva: plain bin integ OK
[0003.020] I> Partition name: A_tsec-fw
[0003.023] I> Size of partition: 262144
[0003.028] I> Bin@ dev:3/0 blk-5632 sz:0x40000 A_tsec-fw
[0003.033] I> Ratchet: [A_tsec-fw]: sw (BCH): 1, hw (BCT): 0
[0003.039] I> pva: Authentication Finalize Done
[0003.044] I> Task: Auxp FW teardown
[0003.046] I> Task: Initialize CPUBL Params
[0003.050] I> Task: Revoke PKC fuse
[0003.053] I> PKC revoke fuse burn not requested
[0003.058] I> Task: FSI padctl context save
[0003.062] I> Task: Unhalt AUXPs
[0003.064] I> AON unhalt skipped
[0003.068] I> Unhalting RCE
[0003.070] I> RCE unhalt successful
[0003.073] I> Unhalting DCE
[0003.076] I> DCE unhalt successful
[0003.079] I> APE unhalt skipped
[0003.082] I> APE1 unhalt skipped
[0003.085] I> FSI unhalt skipped
[0003.088] I> Task: L??init??oad ??iali??HV/C??zed ??PUBL??avfs??
[0??_clk??003.??pla??091]??tfor?? I> ??[TS??m
i??Task??:11??niti??: Lo??748??aliz??ad A??0630??ed p??TF
??129??ower??[000??870??gate??3.09??7660??
in??4] I??8]D??itia??> Ta??CE ??lize??sk: ??Star??d dv??Load??ted??s
i?? Haf??
??niti??nium??aliz??
[0??ed c??003.??lk_m??097]??[TS??ach
?? I> ??:118??conf??Task??5126??ig
??: Lo??9329??init??ad E??0582??iali??KS
??9] I??7720??Ini??[ ??6]DC??susp??3.09?? 2.??E_R5??end
ini??> Ta??49] ??t
??W on??9657??apame??TS:1??ized??Load??ra-F??1917?? str?? SP
??
[00?? t26??1728??init??03.1??4-rc??4061??iali??04] ??e-sa??184]??zed ??I> T??fe s??MPU ??emc
??ask:??tart??enab??late?? Loa??ed
??led
in??d an??TCU ??
[TS??itia??d au??earl??:119??lize??then??y co??7550??d em??tica??nsol??8336??c_mr??te r??e en??2011??q
i??egis??able??7094??niti??tere??d.
C??4]DC??aliz??d FW??oE: ??E_SW??ed c??s
[??setu??_Ini??lk_c??0003??p IR??t
[??al
??ame:??=150??176]??init??] I>??MGBE??1977??iali?? Par??=0 l??3008??zed ??titi??ocal??0644??uphy??on n??_irq??2418??dt
ini?? A_c??
Co??Usin??tial??pu-b??E: s??g fd??ized??ootl??etup??t fr?? pci??oade?? IRQ??om d??e_dt??r
[??=1 M??ce_f??
UP??0003??GBE=??w
[??HY0 ??.141??0 lo??TS:1??rese??] I>??cal
??2204369881931448320]Admin Task Init
[TS:12205388227267264512]Admin Task Init complete
[TS:12206429997354713088]Print Task Init
??t ha?? Siz??irq=??[TS:??s be??e of??151
??2 MG??]RM ??078titi??: se??3555??sert??on: ??tup ??6577??ed 0??5242??IRQ=??6896??x380??880
[00??BE=0??Task??
UPH??03.1?? loc?? Ini??Y0 P??64] ??al_i??t
[??LL 3??I> B??rq=1??TS:2?? LOC??in@ ??52
??8608??KDET??dev:??CoE:??6543??_STA??3/0 ?? set??4]Ad??TUS ??blk-??up I??min ??time??1433??RQ=3??Task??out ??6 sz?? MGB?? Sta??UPHY??:0x5??E=0 ??rted??_PLL??0000??loca??
[T??STA??0 A??l_ir??S:28??TUS ??cpu-??q=15??6111??0x31??boot??3
C??4434??2
i??load??oE: ??]DCE??niti??er
??0] I??MGBE??able??[000??p IR?? SHA??ed u??3.20??Q=4 ?? Dis??phy

F??> Ra??=0 l??d
[??ATAL??tche??ocal??TS:2?? ERR??t: [??irq??8618??OR [??A_cp??=154??4941??FILE??u-bo??
Co??6]RM??=pla??otlo??E: s?? Tas??tfor??ader??etup??k St??m/dr??]: s?? IRQ??arte??iver??w (B??=0 M??d
??155pc??CH):??GBE=??TS:2??ie/p?? 0, ??1 lo??8698??cie-??hw (??cal
??4755??tegr??BCT)??irq=??4]RM??a264??: 0
?? Tas??.c, ??
CoE??k Ru??ERR_??03.2??: se??nnin??UID=??46] ??tup ??g [i??5217??I> c??IRQ=??d:2]??]: X??publ??1 MG??
??PL P?? : o??BE=1??LL l??em a?? loc??ock ??uthe??al_i??time??ntic??rq=1??out ??atio??56
??for ??n of??CoE:??PCIE?? hea?? set?? con??der ??up I??trol??done??RQ=2??ler:??
[0?? MGB?? 2
??003.??E=1 ??firm??276]??loca??ware?? I> ??l_ir?? tag??cpub??q=15??: 50??l: m??7
C??c0e4??eta-??oE: ??7459??blob??setu??b794?? int??p IR??426e??eg O??Q=3 ??e4-b??K
[??MGBE??8f47??0003??=1 l??37c3??.299??ocal??9f
??] I>??irq??r0_u?? ver??=158??sr 0??sion??
Co??x500?? 1 B??E: s??f837??in 1??etup??8
r?? BCh?? IRQ??1_us??eckS??=4 M??r 0x??um 0??GBE=??0000?? con??1 lo??1461??tent??cal
??
r2??siz??irq=??usr??e 0 ??159
??ChkS??tup ?? ??: se??4bd ?? 0x5??Cont??
r3
??um 1??IRQ=??usr ?? res??0 MG??0x50??erve??BE=2??201f??d_00?? loc??34
??al_i??r4_u??
[00??rq=1??sr 0??03.3??60
??x500??39] ??CoE:??2221??I> R?? set??4
r??eser??up I??5_us??ved1??RQ=1??r 0x??0 0 ?? MGB??500f??Bloc??E=2 ??84bd??kMax??loca??
r6??Size??l_ir??usr?? 5 R??q=16?? 0x0??eser??1
??setu???ved1??oE: ??461
r7
??
[00??p IR??usr ??03.3??Q=2 ??0x50??95] ??MGBE??0f83??I> c??=2 l??78
??publ??ocal??r8_u?? : d??irq??sr 0??ecom??=162??x502??pres??
???01f3??sed ??E: s??4 r8??to 3??etup??fiq??3547?? IRQ?? 0x0??52 b??=3 M??0000??ytes??GBE=??000
[0??2 lo??
r9
??003.??cal??usr ??398]??irq=??0x00?? I> ??163
CoE??00 r??l: p??: se??9_fi??lain??tup ??q 0x?? bin??IRQ=??0000?? int??4 MG??0000??eg O??BE=2??
r1??K
[?? loc??0_us??0003??al_i??r 0x??.398??rq=1??5020??] I>??64
??tf80?? Par??CoE:?? r10??titi?? set??fiq??on n??up I?? 0x0??ame:??RQ=0??0000?? A_a?? MGB??000
??E=3 ??
r11??[000??loca??usr??3.41??l_ir?? 0x5??3] I??q=16??0023??> Si??5
C??851 ??ze o??oE: ??r11
??f pa??setu??fiq ??rtit??p IR??0x00??ion:??Q=1 ??0000?? 262??MGBE??00
??=3 l??r12??
[00??ocal??usr ??03.4??irq??0x00??29] ??=166??0001??I> B??
Co??8d r??in@ ??E: s??12_f??dev:??etup??iq 0??3/0 ?? IRQ??x000??blk-??=2 M??0000??4454??GBE=??0
s??4 sz??3 lo??p_us??:0x4??cal
??r 0x??0000??irq=??5020?? A_a??167
??1f18??tf
CoE?? sp??[000??: se??fiq ??3.45??tup ??0x50??1] I??IRQ=??0508??> ma??3 MG??80 s??x_bi??BE=3??p_ir??nary?? loc??q 0x??siz??al_i??5005??e fo??rq=1??0c00??r AT??68
??
sp??F = ??CoE:??svc??0x30?? set?? 0x5??0000??up I??0051??
[0??RQ=4??400 ??003.?? MGB??sp_a??470]??E=3 ??bt 0?? I> ??loca??x500??Ratc??l_ir??5080??het:??q=16??0 sp?? [A
??9
??H): ??atf]?? 0x5??: sw??0050?? (BC??770
lr??0, h??usr ??w (B??0x50??CT):??0235?? 0
??ef l??[000??r_fi??3.49??q 0x??3] I??0000??> cp??0000??ubl:?? lr_?? Aut??irq ??hent??0x50??icat??0209??ion ??a2
??Fina??lr_s??lize??vc 0?? Don??x500??e
[??37a6??0003??b lr??.512??abt??] I>?? 0x0?? Par??0000??titi??000 ??on n??lr_u??ame:??nd 0?? A_s??x500??ecur??2221??e-hv??8
p??
[0??c 0x??003.??5002??529]??2214?? I> ??
sp??Size??sr 0?? of ??x600??part??0001??itio??0
f??n: 2??pscr??6214?? 0x8??4
??.540???0003??010
[ ??] I>??0 ?? Bin??] 5??@ de??0000??v:3/??000 ??0 bl?? 10??k-45??0000??056 ??0 X??sz:0??N P
??x400??RW U??00 A??RW ??sec??Non-??ure-??shar??hv
??: sw??[000??e ou??3.55??ter:??7] I?? WB,??> Ra?? no ??tche??WA i??t: [??nner??A_se??: WB??cure??, no??-hv]?? WA
[ ?? (BC??1 ??H): ??] 8??0, h??0000??w (B??000 ??CT):?? 800?? 0
??0000??[000??0 X??3.57??N P
??4] I??RW U??> at??RW ??f: A??Shar??uthe??eabl??ntic??e st??atio??rong??n Fi??ly-o??nali??rder??ze D??ed
??[ 2??
[00?? ]??03.5?? ff??86] ??ff00??I> P??00 ??arti?? ??tion?? 40?? nam?? X ??e: A?? P_R??eks??O U
??
[0??NA N??003.??on-s??596]??hare?? I> ??able??Size?? out?? of ??er: ??part??WB, ??itio??no W??n: 1??A in??3107??ner:??2
[?? WB,??0003?? no ??.606??WA
??] I>??[ 3?? Bin??.2 ]??@ de?? 50??v:3/??0200??0 bl??00 ??k-33?? 1??792 ??0000??sz:0?? X ??x200?? P_R??00 A??O U??eks??RO N??
[0??on-s??003.??hare??621]??able?? I> ?? out??Ratc??er: ??het:??WB, ?? [A
??no W??eks]??A in??: sw??ner:?? (BC?? WB,??H): ?? no ??0, h??WA
??w (B??[ 3??CT):??.3 ]?? 0
?? 50??[000??0300??3.63??00 ??7] I?? 1??> BL??0000??32/H?? X ??afni?? P_R??um: ??O U??Auth??RO N??enti??on-s??cati??hare??on F??able??inal?? out??ize ??er: ??Done??WB, ??
[0??no W??003.??A in??651]??ner:?? I> ?? WB,??Copy?? no ??ing ??WA
??Hafn??[ 3??ium ??.4 ]??(len?? 50??gth:??0400?? 0x3??00 ??95c0?? 1??) fr??0000??om 0?? X ??x1fc?? P_R??4300??O U_??6e0 ??? out??o 0??on-s??x1fd??hare??f010??able??000
[00??er: ??03.6??WB, ??91] ??no W??I> C??A in??opyi??ner:??ng H?? WB,??afni?? no ??um D??WA
??TB (??[ 4??leng??.2 ]??th: ?? 50??0xfa??0800??c) f??00 ??rom ?? 4??0x1f??0000??c433?? X ??9ca0?? P_R?? to ??O U_??0x1f??RO N??e0e1??on-s??0000??hare??
[0??able??003.?? out??695]??er: ?? I> ??WB, ??Part??no W??itio??A in??n na??ner:??me: ?? WB,??A_se?? no ??c-pa??WA
??.3 ]??[ 4??ion
[00?? 50??03.7??0c00??08] ??00 ??I> S?? 4??ize ??0000??of p?? X ??arti?? P_R??tion??O U_??: 23??RO N??5929??on-s??6
[??hare??0003??able??.719?? out??] I>??er: ?? Bin??WB, ??@ de??no W??v:3/??A in??0 bl??ner:??k-45?? WB,??568 ?? no ??sz:0??WA
?? 4??[ 4??000 ??.4 ]??A_se?? 50??c-pa??1000??rtit??00 ??ion
[00??0000??03.7?? X ??36] ?? P_R??I> m??O U_??ax_b??RO N??inar??on-s??y_si??hare??ze f??able??or S?? out??ecur??er: ??e Pa??WB, ??rtit??no W??ion ??A in??= 0x??ner:??4000?? WB,??00
?? no ??[000??WA
??3.75??[ 5??3] I??.0 ]??> Ra?? 50??tche??1400??t: [??00 ??A_se?? ??c-pa??8000??rtit?? X ??ion]?? P_R??: sw??O U_?? (BC??RO N??H): ??on-s??0, h??hare??w (B??able??CT):?? out?? 0
??er: ??[000??WB, ??3.77??no W??1] I??A in??> ek??ner:??s: A?? WB,??uthe?? no ??ntic??WA
??00 ??[ 6??n Fi?? ]??nali?? 50??ze D??2000??one
[00?? 8??03.7??0000??83] ?? XN??I> s?? P_R??ec-p??O U_??arti??NA N??tion??on-s?? : o??hare??em a??able??uthe?? out??ntic??er: ??atio??WB, ??n of??no W?? hea??A in??der ??ner:??done?? WB,??
[0?? no ??003.??WA
??800]??[ 7?? I> ??.3 ]??sec-?? 50??part??6000??itio??00 ??n: m?? 20??eta-??0000??blob?? XN?? int?? P_R??eg O??O U_??K
[??RO N??0003??on-s??.816??hare??] I>??able?? ver?? out??sion??er: ?? 1 B??WB, ??in 1??no W?? BCh??A in??eckS??ner:??um 0?? WB,?? con?? no ??tent??WA
??O U_??[ 7??e 0 ??.4 ]??Cont?? 50??ent ??8000??ChkS??00 ??um 1?? 20?? res??0000??erve?? XN??d_00?? P_R?? 0
[00??RO N??03.8??on-s??37] ??hare??I> R??able??eser?? out??ved1??er: ??0 0 ??WB, ??Bloc??no W??kMax??A in??Size??ner:?? 5 R?? WB,??eser?? no ??ved1??WA
??[ 9??
?? ] 40??[000??0000??3.88??00 ??5] I?? 4??> se??0000??c-pa?? XN??rtit?? P_R??ion ??W U_??: de??RW N??comp??on-s???no W??are??ed t??able??o 27?? out??6896??er: ??0 by??WB, ??tes
[00??A in??03.8??ner:??88] ?? WB,??I> s?? no ??ec-p??WA
??arti??[ 10??tion?? ]??: pl?? 50??ain ??0000??bin ??00 ??inte?? 2??g OK??0000??
[0?? XN??003.?? P_N??888]??A U_?? I> ??NA S??sec-??hare??part??able??itio?? str??n: A??ongl??uthe??y-or??ntic??dere??atio??d
??2000??? 11.??nali??1 ] ??ze D?? 508??one
[00??0 ??03.8?? 20??98] ??000 ??I> N?? XN ??VRNG??P_NA??: He?? U_N??alth??A Sh?? che??area??ck s??ble ??ucce??stro??ss
??ngly??[000??-ord??3.90??ered??8] I??
[ ??> NV??11.2??RNG:?? ] ?? Hea??5084??lth ??0000??chec?? ??k su?? 200??cces??00 ??s
??aram???0003??_NA ??.920??U_NA??] I>?? Sha?? Tas??reab??k: P??le s??repa??tron??re H??gly-??afni??orde??um p??red
[ 1??s
[??1.3 ??0003??] 5??.930??0860??] I>??000 ?? haf?? ??par??2000??ams ??0 X??= 0x??N P??1fdf??NA U??0000??NA ??00
??Shar??[000??eabl??3.94??e st??1] I??rong??> BL??ly-o??32 E??rder??P pa??ed
??ram-??[ 11??hdr ??.4 ]??(typ?? 50??e: 0??8800??x1, ??00 ??vers?? 2??ion:??0000?? 0x1?? XN??, si?? P_N??ze: ??A U
??0x58??NA S??, at??hare??tr: ??able??0x0)?? str??
[0??ongl??003.??y-or??963]??dere?? I> ??d
[??BL32?? 11.?? EP ??5 ] ?? PC?? 508??: 0x??a000??1fdf??0 ??0100?? 20??00
??000 ??[000?? XN ??3.97??P_NA??4] I?? U_N??> BL??A Sh??32 E??area??P SP??ble ??SR: ??stro??0x3c??ngly??9
[??-ord??0003??ered??.983??
??XN P???11.6?? BL3?? ] ??2 EP??508c?? X??0000??0: 0?? ??x1fe?? 200??0e10??00 ??000
[00??NA ??03.9??U_NA??94] ?? Sha??I> B??reab??L32 ??le s??EP ??tron?? X1:??gly-?? 0x0??orde??
??004.??
[ 1??002]??1.7 ?? I> ??] 5??BL32??08e0?? EP ??000 ?? X2?? ??: 0x??2000??1fdf??0 X??0000??N P
??00
??NA U??[000??NA ??4.01??Shar??4] I??eabl??> BL??e st??32 E??rong??P ??ly-o??X3: ??rder??0xca??ed
??feba??[ 12??be
??A U
??[000?? 50??4.02??9000??4] I??00 ??> BL?? 10??32 E??0000??P ?? XN??X4: ?? P_N??0x0
[00??NA S??04.0??hare??32] ??able??I> B?? str??L32 ??ongl??EP ??y-or?? X5:??dere?? 0x0??d
[??
[0?? 12.??004.??2 ] ??041]?? 50a?? I> ??0000??BL32??0 ?? EP ?? 100?? X6??000 ??: 0x?? XN ??0
[??P_NA??0004?? U_N??.050??A Sh??] I>??area?? BL3??ble ??2 EP??stro?? X??ngly??7: 0??-ord??x0
??ered??[000??
[ ??4.05??12.3??9] I?? ] ??> PC??50b0?? INF??0000??O fr?? ??om e??1000??pinf??00 ??o = ??XN P??0x14??NA ??0000??U_NA??10
??aram??[000??reab??4.07??le s??1] I??tron??> BL??gly-??32 I??orde??MG p??red
[ 1??-hdr??2.4 ?? (ty??] 5??pe: ??0c00??0x0,??000 ?? ver?? 1??sion??0000??: 0x??0 X??0, s??N P
??ize:??NA U?? 0x0??NA ??, at??Shar??tr: ??eabl??0x0)??e st??
[0??rong??004.??ly-o??093]??rder?? I> ??ed
??BL32??[ 12?? IMG??.5 ]?? ima?? 50??ge b??d000??ase:??00 ?? 0x1?? 10??fdf0??0000??1000?? XN??0
[?? P_N??0004??A U
??.105??NA S??] I>??hare?? BL3??able??2 IM?? str??G im??ongl??age ??y-or??size??dere??: 0x??d
[??395c?? 12.??0
[??6 ] ??0004?? 50e??.117??0000??] I>??0 ?? Tas?? 100??k: P??000 ??repa?? XN ??re A??P_NA??TF p?? U_N??aram??A Sh??s
[??area??0004??ble ??.127??stro??] I>??ngly?? NVR??-ord??NG: ??ered??Heal??
[ ??th c??12.7??heck?? ] ?? suc??50f0??cess??0000??
??gly-???004.??1000??140]??00 ?? I> ??XN P??NVRN??NA ??G: H??U_NA??ealt?? Sha??h ch??reab??eck ??le s??succ??tron??ess
??50] ??[00??orde??04.1??red
[ 1??I> S??5 ??kipp??] 5??ing ??0200??‘tid??000 ??-tab?? ??le-a?? 200??ddr’??0 X?? upd??N P
??ate ??RW U??in A??RW ??TF D??Non-??TB
?? ver??[000??eabl??4.16??e ou??6] I??ter:??> BL?? WB,??31 p?? no ??aram??WA i??-hdr??nner?? (ty??: WB??pe: ??, no??0x0,?? WA
Boo??sion??tstr??: 0x??ap s??0, s??p 0x??ize:??5020?? 0x0??1f18??, at?? sta??tr: ??ck: ??0x0)??5020??
??BL31???004.?? - 5??186]??0201?? I> ??ffc
??ersi??Per?? IMG?? tas?? par??k re??am-h??gion??dr (??s fo??type??r Bo??: 0x??otst??0, v??rap
[ ??on: ??2 ??0x0,??] 5?? siz??0200??e: 0??000 ??x0, ?? ??attr?? 200??: 0x??0 X??0)
??N P
??[000??RW U??4.20??RW ??7] I??Non-??> Ta??shar??sk: ??eabl??OEM ??e ou??SC7 ??ter:??cont?? WB,??ext ?? no ??save??WA i??
??DRAM???004.??: WB??218]??, no?? W> ?? WA
Ena?? bad??ble ?? pag??MMIO??e li??: 1,??st i?? Ena??s em??ble ??pty!??data??
??258]???004.??: 1
cal?? I> ??l st??OEM
??ack:??SC7 ??
sp??cont?? 0x5??ext ??0201??data??f18 ?? sav??pc 0??ed
??x500??[000??2221??4.25??4
s??9] I??p 0x??> Ta??5020??sk: ??1f18??Clea?? pc ??r de??0x50??c so??0235??urce??ee
?? key??sp 0??
??ply ???004.??01f3??259]??0 pc?? I> ?? 0x5??Task??00c8??: Ap??870
??60 p??sp ??HWPM??0x50?? con??201f??fig
[00??c 0x??04.2??500a??62] ??e6ce??I> S??
sp??kipp?? 0x5??ing ??0201??- no??f70 ??t in??pc 0?? ODM??x500?? pro??88b5??d mo??8
s??de
??p 0x??[000??5020??4.27??1fb0??4] I?? pc ??> Ta??0x50??sk: ??086c??DRAM??1c
??0 pc??sp 0?? upd??x502??ate ??01fe??prl
??I> T??[00?? 0x5??04.2??00c9??85] ??94e
sp ??ask:??0x50?? Sto??201f??rage??f8 p?? dev??c 0x??ice ??aaaa??dein??aaaa??it
??
eh??[000??t_id??4.29??x_fi??6] I??nd: ??> Ta??0xaa??sk: ??aaaa??Prog??aa n??ram ??ot a??OEM ?? val??fire??id c??wall??ode ??s -?? boo???late??ess
no ??t
?? fir???0004?? for??.313?? 0xa??] I>??aaaa?? OEM??aaa
??ewalls configured
[0004.321] I> Task: SMMU restore
[0004.330] I> Task: Program GICv3 registers
[0004.342] I> Task: Disable Interrupt for NSR IP’s
[0004.352] I> Task: Audit firewall settings
[0004.356] I> Task: Trigger tsec mailbox for PSC-fw exit
[0004.366] I> Task: Ratchet update
[0004.366] W> Skip ratchet update - OPTIN fuse not set
[0004.369] I> Ratchet: [BR-BCT ]: active: 0, MIN(in-active): 0, hw: 0
[0004.375] I> Ratchet: [MB1 ]: active: 0, MIN(in-active): 0, hw: 0
[0004.381] I> Ratchet: [PSC-BL ]: active: 0, MIN(in-active): 0, hw: 0
[0004.388] I> Ratchet: [MB1-BCT ]: active: 0, MIN(in-active): 0, hw: 0
[0004.394] I> Ratchet: [HPSE-BCT ]: active: 0, MIN(in-active): 0, hw: 0
[0004.401] I> Ratchet: [HPSE-BL ]: active: 0, MIN(in-active): 0, hw: 0
[0004.407] I> Ratchet: [HPSE-FW ]: active: 0, MIN(in-active): 0, hw: 0
[0004.413] I> Ratchet: [TSEC ]: active: 0, MIN(in-active): 0, hw: 0
[0004.420] I> Ratchet: [IGPU-FW ]: active: 0, MIN(in-active): 0, hw: 0
[0004.426] I> Ratchet: [IGPU-ACR ]: active: 0, MIN(in-active): 0, hw: 0
[0004.432] I> Ratchet: [SB-BCT ]: active: 0, MIN(in-active): 0, hw: 0
[0004.439] I> Ratchet: [SB-BL ]: active: 0, MIN(in-active): 0, hw: 0
[0004.445] I> Ratchet: [SB-FW ]: active: 0, MIN(in-active): 0, hw: 0
[0004.452] I> Ratchet: [BPMP-FW ]: active: 0, MIN(in-active): 0, hw: 0
[0004.458] I> Ratchet: [PSC-FW ]: active: 0, MIN(in-active): 0, hw: 0
[0004.464] I> Ratchet: [KIST-FW ]: active: 0, MIN(in-active): 0, hw: 0
[0004.471] I> Ratchet: [XUSB-FW ]: active: 0, MIN(in-active): 0, hw: 0
[0004.477] I>
[0004.478] I> Task: Compute cpubl params hash
[0004.483] I> Added cpubl params hash.
[0004.486] I> Task: Lock fusing
[0004.489] I> Task: Disable Vdd fuse rail
[0004.493] I> Task: Disable CCPLEX WDT
[0004.496] I> MB2 finished

NOTICE: BL31: lts-v2.8.16(release):4a239df
NOTICE: BL31: Built : 13:15:13, Jun 1 2026
INFO: Initializing Hafnium (SPMC)
INFO: text: 0x1fdf010000 - 0x1fdf03c000
INFO: rodata: 0x1fdf03c000 - 0x1fdf049000
INFO: data: 0x1fdf049000 - 0x1fdf6b9000
INFO: stacks: 0x1fdf6c0000 - 0x1fdf6f8000
INFO: Supported bits in physical address: 48
INFO: Stage 2 has 4 page table levels with 1 pages at the root.
INFO: Stage 1 has 4 page table levels with 1 pages at the root.
S Memory ranges:
NS Memory ranges:
[80000000 - 8080000000 (134217728 pages)]
[10080000000 - 18080000000 (134217728 pages)]
INFO: Boot order 0
WARNING: base_address (0x8189870000) overlaps with existing region.
WARNING: base_address (0x8189850000) overlaps with existing region.
WARNING: base_address (0x1fe0e20000) overlaps with existing region.
INFO: Boot order 1
WARNING: base_address (0x1fe2e20000) overlaps with existing region.
INFO: Unable to find ‘/interrupt-controller. Using default configuration.’
INFO: Loading VM id 0x8001: optee.
INFO: Loaded with 28 vCPUs, entry at 0x1fe0e20000.
INFO: Loading VM id 0x8002: standalonemm.
INFO: Loaded with 1 vCPUs, entry at 0x1fe2e20000.
INFO: Hafnium initialisation completed
??ERROR: camera-ip/isp5/isp5.c:2709 [isp5_pm_init] “ERROR: Failed to turn isp power on”
??[8001 0] I/TC:
[8001 0] I/TC: No non-secure external DT
[8001 0] I/TC: manifest DT found
[8001 0] I/TC: Switching console to device: /ffa-console
[8001 0] I/TC: OP-TEE version: 4.6 (gcc version 13.2.0 (crosstool-NG 1.26.0)) #2 Mon Jun 1 20:20:26 UTC 2026 aarch64
[8001 0] I/TC: WARNING: This OP-TEE configuration might be insecure!
[8001 0] I/TC: WARNING: Please check Porting guidelines — OP-TEE documentation documentation
[8001 0] I/TC: Primary CPU initializing
[8001 0] I/TC: Test TZ root key is being used. This is insecure for shipping products!
[8001 0] I/TC: Tegra HUK generated successfully.
[8001 0] I/TC: fTPM ID is not enabled.
[8001 0] I/TC: ftpm-helper PTA: fTPM DT or EKB is not available. fTPM provisioning is not supported.
[8001 0] I/TC: Primary CPU switching to normal world boot
INFO: Initialized VM: 0x8001, boot_order: 0
[8002 0] STMM: StandaloneMmJetson (version 39.2.0-gcid-45755727)
[8002 0] STMM: StandaloneMmJetson (built on 2026-06-01T20:18:49+00:00)
[8001 0] I/TC: WARNING: Test UEFI variable auth key is being used !
[8001 0] I/TC: WARNING: UEFI variable protection is not fully enabled !
[8002 0] STMM: Boot Complete
INFO: Initialized VM: 0x8002, boot_order: 1
NOTICE: Finished initializing all VMs.
??ERROR: camera-ip/isp5/isp5.c:2709 [isp5_pm_init] “ERROR: Failed to turn isp1 power on”
BUG: core/init/init.c:129 [init_all] “*** FIRMWARE INIT FAILED AT LEVEL 95 FEATURE ID 13 ***”
??ERROR: tegra_bpmp_ipc_init_one: BPMP firmware is not ready
ERROR: socket 0 IVC channel init failed
ASSERT: plat/nvidia/tegra/soc/t264/plat_setup.c:726
???

Hi @mingkuo2010 ,

You can follow the method mentioned by @WayneWWW to dump the logs; otherwise, the logs will contain a lot of garbled message, making debugging impossible. There is a reference link here[Link]、[Link]you can try it.

Additionally, according to the Release Note, the NVMe capacity must be greater than 234GB. If it is smaller than that, it needs to be modified following the provided instructions. Have you made those changes on your side?

Thanks!!

image

TZ0.txt (51.9 KB)

RCE.txt (3.7 KB)

RAW.txt (160.2 KB)

PSCFW.txt (1.9 KB)

DCE.txt (1.7 KB)

BPMP.txt (87.4 KB)

sudo EXT_NUM_SECTORS=239075328 SKIP_EEPROM_CHECK=1 UNIFIED_FLASH=1 ROOTFS_AB=1 ./tools/kernel_flash/l4t_initrd_flash.sh 烧录是成功的

那請問你現在是能啟動了嗎?

可以烧录成功,不能正常启动。全部的log都在上面,帮忙分析问题,如何解决这个错误

[2026-06-18 11:40:58.239244] UPHY0 reset has been de-asserted 0x380078
[2026-06-18 11:40:58.255324] UPHY0 PLL 3 LOCKDET_STATUS timeout UPHY_PLL_STATUS 0x312
[2026-06-18 11:40:58.303168] initialized uphy
[2026-06-18 11:40:58.319001] 
[2026-06-18 11:40:58.319052] FATAL ERROR [FILE=platform/drivers/pcie/pcie-tegra264.c, ERR_UID=5217]: XPL PLL lock timeout for PCIE controller: 2
[2026-06-18 11:40:58.367275] firmware tag: 50c0e47459b794426ee4-b8f4737c39f

What is the device in use on your PCIe C2 controller?

不是pcie C2,我用的pcie C3

請問你在開C3之前有做了哪些configuraiton? 預設的board config是沒有開C3的

請問你確定這一步有做嗎? 目前你碰到的那個錯誤就是UPHY_CONFIG依然有設定的狀況.

[2026-06-18 11:40:58.239244] UPHY0 reset has been de-asserted 0x380078
[2026-06-18 11:40:58.255324] UPHY0 PLL 3 LOCKDET_STATUS timeout UPHY_PLL_STATUS 0x312
[2026-06-18 11:40:58.303168] initialized uphy
[2026-06-18 11:40:58.319001] 
[2026-06-18 11:40:58.319052] FATAL ERROR [FILE=platform/drivers/pcie/pcie-tegra264.c, ERR_UID=5217]: XPL PLL lock timeout for PCIE controller: 2
[2026-06-18 11:40:58.367275] firmware tag: 50c0e47459b794426ee4-b8f4737c39f

# SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.

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# 3. Neither the name of the copyright holder nor the names of its

# contributors may be used to endorse or promote products derived from

# this software without specific prior written permission.

#

# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS”

# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE

# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR

# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER

# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,

# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

# p3834-0008-p4071-0000-nvme.conf: configuration for

# “P4070(Board) = P3834(CVM) + P4071(CVB)”

# (T264 P4070).

# Sourced by bash script.

# Disable unused variable check. Most of these variables are used in an outer

# script that sources this file.

source “${LDK_DIR}/t264.conf.common”;

CMDLINE_ADD+=" video=efifb:off console=tty0"

DTB_FILE=“tegra264-p4071-0000+p3834-0008-nv.dtb”;

TBCDTB_FILE=“${DTB_FILE}”;

BPFDTB_FILE=“tegra264-bpmp-3834-0008-4071-xxxx.dtb”;

BPFFILE=“bootloader/bpmp_t264-TA1090SA-A1_prod.bin”;

EXTERNAL_PT_LAYOUT=“tools/kernel_flash/flash_l4t_t264_nvme.xml”;

EMC_BCT=“tegra264-p3834-0008-sdram-bct-l4t.dts”;

WB0SDRAM_BCT=“tegra264-p3834-0008-sdram-bct-warmboot-l4t.dts”;

BPMP_MEM_CONFIG=“tegra264-p3834-0008-sdram-dfs.dts”;

MISC_CONFIG=“tegra264-mb1-bct-misc-p3834-0008-p4071-0000.dts”;

SCR_CONFIG=“tegra264-mb2-bct-firewall-p3834-xxxx-p4071-0000.dts”;

PINMUX_CONFIG=“tegra264-mb1-bct-pinmux-p3834-xxxx-p4071-0000.dts”;

PMIC_CONFIG=“tegra264-mb1-bct-pmic-p3834-0008-p4071-0000-vdd-fuse-aon.dts”;

PMC_CONFIG=“tegra264-mb1-bct-padvoltage-p3834-xxxx-p4071-0000.dts”;

DEVICE_CONFIG=“tegra264-mb1-bct-device-p3834-xxxx.dts”;

DEVICEPROD_CONFIG=“tegra264-mb1-bct-cprod-p3834-xxxx-p4071-0000.dts”;

PROD_CONFIG=“tegra264-mb1-bct-prod-p3834-xxxx-p4071-0000.dts”;

MB2_BCT=“tegra264-mb2-bct-misc-p3834-xxxx-p4071-0000.dts”;

# Rollback protection

MINRATCHET_CONFIG=“tegra264-mb1-bct-ratchet-p3834-xxxx-p4071-0000.dts”;

GPIOINT_CONFIG=“tegra264-mb1-bct-gpioint-p3834-xxxx-p4071-0000.dts”;

UPHY_CONFIG=“tegra264-mb1-bct-uphy-lanes-p4071-0000.dts”;

RAMCODE=12;

EXTERNAL_DEVICE=“nvme0n1p1”;

OVERLAY_DTB_FILE+=“,tegra264-p4071-0000+p3834-xxxx-dynamic.dtbo”;

# Uncomment below line to enable C4 RP controller in SRIS mode

#ODMDATA=“pcie@4_clk-scheme=1”

# Uncomment below line to enable C4 controller in Endpoint SRIS mode.

#ODMDATA=“pcie-c4-endpoint-enable,pcie-c4-endpoint-use-int-refclk,pcie@4_clk-scheme=1_pcie-mode=2”

# Rootfs A/B:

if [[ “${ROOTFS_AB}” == 1 && “${ROOTFS_ENC}” == “” ]]; then

EXTERNAL_PT_LAYOUT="tools/kernel_flash/flash_l4t_t264_nvme_rootfs_ab.xml";

# Disk Encryption

elif [[ “${ROOTFS_AB}” == “” && “${ROOTFS_ENC}” == 1 ]]; then

disk_enc_enable=1;

EXTERNAL_PT_LAYOUT="tools/kernel_flash/flash_l4t_t264_nvme_rootfs_enc.xml";

# Rootfs A/B + Disk encryption support:

elif [[ “${ROOTFS_AB}” == 1 && “${ROOTFS_ENC}” == 1 ]]; then

disk_enc_enable=1;

EXTERNAL_PT_LAYOUT="tools/kernel_flash/flash_l4t_t264_nvme_rootfs_ab_enc.xml";

fi

update_flash_args() {

if \[\[ "${board_id}" =\~ "3834" \]\] && \[ "${board_sku}" = "0008" \]; then

    if \[\[ "${board_FAB}" =\~ ^\[0-9\]+$ && "${board_FAB}" -le 400 \]\] || \\

       \[\[ "${board_FAB}" =\~ ^EB\[0-8\]$ \]\] || \\

       \[\[ "${board_FAB}" =\~ ^TS\[0-4\]$ \]\] || \\

       \[\[ "${board_FAB}" =\~ ^RC\[0-1\]$ \]\]; then

        PMIC_CONFIG="tegra264-mb1-bct-pmic-p3834-0008-p4071-0000.dts";

    fi

fi

}

ODMDATA=“uphy0-config-6,pcie@3_status=okay”;

最终是这么修改的

? 這裡不是還在嗎

我改一下试试

Is this still an issue to support? Any result can be shared?

可以正常启动了,非常感谢