Hi,
I read in the documantation about tegra_sinterface:
tegra_sinterface: The NVCSI port, enumerated from “serial_”
(<T19x) and “serial” (>=T19x).
I have 4 ser/des pairs connected the following way:
vi port0 <->nvcsi port 0<->ser/des pair_a
vi port1 <->nvcsi port 1<->ser/des pair_b
vi port2 <->nvcsi port 2<->ser/des pair_c
vi port3 <->nvcsi port 3<->ser/des pair_d
Should I configure:
ser/des pair_a dt node with tegra_sinterface=“serial_a”
ser/des pair_b dt node with tegra_sinterface=“serial_b”
ser/des pair_c dt node with tegra_sinterface=“serial_c”
ser/des pair_d dt node with tegra_sinterface=“serial_d”
Thank you for your answer!
I apologise, I think I didn’t understand your answer in that post:
hello rary,
here are some details about the port-index of NVCSI and VI
nvcsi@ node should be the NVCSI port
CSI Port A := 0
CSI Port B := 1
CSI Port C := 2
CSI Port D := 3
CSI Port E := 4
CSI Port F := 5
CSI Port G := 6
CSI Port H := 7
vi@ node should be NVCSI PixelParser index (aka. stream_id), the last two bricks, each CSI-E/F and CSI-G/H share a single PixelParser.
Stream 0 := 0 (CSI Port A)
Stream 1 := 1 (CSI Port B)
Stream 2 := 2 (CSI Port C)
Stream 3 := 3 (CSI Port D)
Stream 4 := 4 (CSI Port EF)
Stream 5 := 5 (CSI Port GH)
for example,
if you had a sensor connect to CSI-G,
the port-index device tree property should be indicate as below.
From your answer I understood there is a “direct 1 to 1 mapping” between csi port and vi port.
So for my case the configs are:
ser_des pair 0 with 2 lanes
tegra_sinterface = “serial_a”
out_index = 0 → csi port 0 (port a) → vi port 0 (stream 0)
ser_des pair 1 with 2 lanes:
tegra_sinterface = “serial_b”
out_index = 1 → csi port 1 (port B) → vi port 1 (stream 1)
ser_des pair 2 with 2 lanes:
tegra_sinterface = “serial_c”
out_index = 2 → csi port 2 (port B) → vi port 2 (stream 2)
ser_des pair 3 with 2 lanes:
tegra_sinterface = “serial_d”
out_index = 3 → csi port 3 (port B) → vi port 3 (stream 3)
The problem is that the same ser-des pairs work fine with port 3 but not with port 2.
In addition I saw some posts out there and examples that the sensor_out_index is increased by two from sensor to sensor and not by one.
These are my current port bindings: final_dt.txt (425.2 KB)
my media-ctl output before loading kernel modules: media_ctl.log (951 Bytes)
you should also note that, CSI0 D1 and CSI1 D0 P/N will always been swizzled for P/N on Orin NX,
please see-also Jetson Orin NX Series and Orin Nano Series Design Guide for [Figure 10-1. CSI 2-Lane Connection Options].
hence, please use device tree property, lane_polarity to configure a polarity swap on any lane.
you may check reference driver, $public_sources/kernel_src/hardware/nvidia/platform/t23x/p3768/kernel-dts/cvb/tegra234-camera-rbpcv2-imx219.dtsi
Thanks @JerryChang .
I apologise but I didn’t understand your explanation so far regarding the suitable port-index values.
From your previous answer I understood that I need to increase the port-index for each device by 1.
From your last answer and the reference you gave, I see they increase the port-index for each device by 2 (started with zero and then increased to two).
This is my current config:
PI = Device Tree Port Index Property
Sensor #
Pysical CSI
lanes #
Sensor PI
NVCSI PI
VI PI
tegra_sinterface
lane_polarity
0
0
2
0
0
0
serial_a
6
--------
---------
-----------
--------------
--------------
--------------
------------------
---------------
1
1
2
1
1
1
serial_b
1
--------
---------
-----------
--------------
--------------
--------------
------------------
---------------
2
2
2
2
2
2
serial_c
0
--------
---------
-----------
--------------
--------------
--------------
------------------
---------------
3
3
2
3
3
3
serial_d
0
--------
---------
-----------
--------------
--------------
--------------
------------------
---------------
With my current config, whatever connected to CSI port 2 is not working.
From the example you referenced to, it should be: PI = Device Tree Port Index Property
First two sensors (0 , 1) are FPD Link.
Last two sensors (2,3) are GMSL.
With my current config, it doesn’t matter which of the two GMSL sensors are connected to port 2 - they don’t work (there is no input and gstreamer is timed out)
If I connect each of them (not together) to port 3 - they work.
There is something wrong with my config for my use case.
Maybe I configured something else wrong besides of the port-index?
there’s no related messages about sensor frames, it might due to there’s no validate frame packets on the CSI channel.
please double check Sensor Pixel Clock setting since it must be set correctly to avoid potential issues.
We use the same pixel clock value for both CSI port 3 connected device and CSI port 2 connected device.
When plugging the same device into CSI port 3 - it works and when plug it into CSI port 2 - it doesn’t.
That’s why we suspect there something else wrong with our dt/cameras configuration.
Is it possible for us to review with you all related config parts and maybe you’ll see something that we are missing? (maybe the port-indexes, maybe the cameras modules settings under tcp: tegra-camera-platform)
you’ve incorrect path within tegra-camera-platform{} .
for instance, proc-device-tree = “/proc/device-tree/cam_i2cmux/i2c@0/max9288_des0@48”;
your camera node max9288_des0@48 it’s actually defined under i2c@3.
this should be minor, but, please configure position property with different settings within tegra-camera-platform{}.
for instance, you may using bottomleft , bottomright , centerleft , centerright for your 4-cam system
Of course!
I followed this thread since its suitable for my needs:
I applied various changes to my dt according to the answers appeared here and then it worked for me as well. I don’t know to point the exact specific change that made this happen. Apologies.