JP6 USB compliance tunning

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Orin
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1

Hi Nvidia Team,

We would like to know if USB compliance tunning still support on JP6 BSP?
There is device-tree property “nvidia,hs_curr_level_offset” in JP5 to adjust usb offset value, but not support in JP6.

To compare with 35.4.1, we found some code is missing in JP6 , therefore, to set “nvidia,hs_curr_level_offset=” will not do any change on USB defualt value.

Could we apply 35.4.1 kernel code to 36.X for USB compliance ?
or , Nvidia team will provide other method to do USB compliance tunning

Regards

2

Hi,

If you are designing a custom base board, then it means some adaptation configurations are needed.
Otherwise, your board may not work fine.

For Orin AGX series, you could refer to below document
https://docs.nvidia.com/jetson/archives/r36.3/DeveloperGuide/HR/JetsonModuleAdaptationAndBringUp/JetsonAgxOrinSeries.html?highlight=universal%20serial%20bus#jetson-agx-orin-platform-adaptation-and-bring-up
(please be aware that above link is for rel-36.3/jetpack6.0)

This document includes below configuration

  1. pinmux change & GPIO configuration
  2. EEPROM change as most custom boards do not have an EEPROM on it.
  3. Kernel porting
  4. PCIe configuration
  5. USB configuration
  6. MGBE configuration
  7. RGMII configuration

Thanks!

4

Hi carolyuu,

Yes, we are using costomer carrier board, and we follow nvidia Compliance-Guide and nvidia forum advice to add device-tree property to adjust USB hs_curr_level offset on BSP 35.4.1.
After doing these actions, our usb eye pattern pass.

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image858×1036 15.1 KB

Due to doing BSP upgrade on our customer board from 35.4.1 , we also need to apply USB tunning value to R36.

So , here is our question :
How to set hs_curr_level offset in BSP 36.x ? Because this device-tree property will not be access when usb driver probe on BSP 36.x.
After compare kernel source , we found some initial code missing in R36.x.

And, I don’t understand how module bring-up step in documentation can help USB pass eye pattern??
Or would you please point out how to use this documentation to fine tune USB compliance?

Regards

5

Hello,

Are you talking about you have new hs_curr_level offset to set but DT in rel-36 has not property to make it work anymore?

6

Hi WayneWWW,

Yes, we have new hs_curr_level offset to set but DT in rel-36 has not property to make it work anymore.

Regards

7

Hi,

We have discussion about this topic before. Please refer to

8

Hi WayneWWW ,

this is what we add to JP6 as the link you provide.
The problem in JP6 is “nvidia,hs_curr_level_offset = <6>;” will not work due to some code missing.

You can find “nvidia,hs_curr_level_offset” didn’t be of_property_get in kernel source , but it did in 35.4.1.

So, we do think there is code lose for “nvidia,hs_curr_level_offset” initial.

Regards

9

Hi,

The point here is we don’t support to adjust these anymore. You could only adjust the hardware.

10

Hi WayneWWW,

If USB adjust no longer support in JP6, should nvidia team remove “Tuning Procedure and Registers” “HS_CURR_LEVEL Offset Adjustment Procedure” and “Software Verification” in Modules Tuning and Compliance Guide which Nvidia released?
Or to add note in document and show people these tunning not support in R36.x BSP ?

Jetson-Orin-Nano-NX-Series-Modules-Tuning-Complinace-Guide_DA-11267-001v1.1.pdf (1.4 MB)

Jetson-AGX-Orin-Series-Modules-Tuning-Complinace-Guide_DA-11040-001v1.3.pdf (1.5 MB)

Regards