JP7 R38.2.0 how to enable the spi@810c590000 master device

Robotics & Edge Computing Jetson Systems Jetson Thor
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1

hi:

JP7 R38.2.0 how to enable the spi@810c590000 master device, i want use spi@810c590000 such as master device,in the kernel Which .c file should be used，and How to configure the device tree

1、config the spi@810c590000 node compatible = “nvidia,tegra210-spi”;

use this file kernel/kernel-noble/drivers/spi/spi-tegra114.c

2、pinmux config

                    spi1_sck_pj7 {
                            nvidia,pins = "spi1_sck_pj7";
                            nvidia,function = "spi1_sck";
                            nvidia,pull = <TEGRA_PIN_PULL_UP>;
                            nvidia,tristate = <TEGRA_PIN_DISABLE>;
                            nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                            nvidia,drv-type = <TEGRA_PIN_1X_DRIVER>;
                            nvidia,e-io-od = <TEGRA_PIN_DISABLE>;
                            nvidia,e-lpbk = <TEGRA_PIN_DISABLE>;
                    };
                    spi1_miso_pk0 {
                                nvidia,pins = "spi1_miso_pk0";
                                nvidia,function = "spi1_din";
                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                                nvidia,drv-type = <TEGRA_PIN_1X_DRIVER>;
                                nvidia,e-io-od = <TEGRA_PIN_DISABLE>;
                                nvidia,e-lpbk = <TEGRA_PIN_DISABLE>;
                        };
                        spi1_mosi_pk1 {
                                nvidia,pins = "spi1_mosi_pk1";
                                nvidia,function = "spi1_dout";
                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                                nvidia,drv-type = <TEGRA_PIN_1X_DRIVER>;
                                nvidia,e-io-od = <TEGRA_PIN_DISABLE>;
                                nvidia,e-lpbk = <TEGRA_PIN_DISABLE>;
                        };
                        spi1_cs0_pk2 {
                                nvidia,pins = "spi1_cs0_pk2";
                                nvidia,function = "spi1_cs0";
                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                                nvidia,drv-type = <TEGRA_PIN_1X_DRIVER>;
                                nvidia,e-io-od = <TEGRA_PIN_DISABLE>;
                                nvidia,e-lpbk = <TEGRA_PIN_DISABLE>;
                        };

Please check if this pinmux configuration is correct. Thank you

2

hi:

I’d like to ask how to adjust the delay between cs and clk

5

Hi,
For enabling SPI interface, please check the examples in

Making sure you're not a bot!

To configure delay, you may try to set the properties:

                                nvidia,rx-clk-tap-delay = <0x10>;
                                nvidia,tx-clk-tap-delay = <0x0>;
6

hi：

The verification has no effect

image
image1920×1020 104 KB

7

hi：

Now the test has found that there is a state where the cs signal is pulled up. Please help analyze it. Thank you

image
image1920×1032 56 KB

8

As my understanding, the SPI interface has been configured as Master by default.
You can refer to https://elinux.org/Jetson/L4T/peripheral/#Mapping for the mapping of SPI interface on AGX Thor.

It seems you’ve enabled SPI and gotten the signal there.
SPI-CS will de-assert betweeen the transfers.

9

hi：

It has been solved.